forked from OSchip/llvm-project
125 lines
8.1 KiB
LLVM
125 lines
8.1 KiB
LLVM
; RUN: opt %loadPolly -polly-opt-isl -polly-pattern-matching-based-opts=true \
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; RUN: -debug < %s 2>&1| FileCheck %s
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; RUN: opt %loadPolly -polly-opt-isl -polly-pattern-matching-based-opts=true \
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; RUN: -polly-target-throughput-vector-fma=1 \
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; RUN: -polly-target-latency-vector-fma=8 \
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; RUN: -polly-target-1st-cache-level-size=32768 \
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; RUN: -polly-target-vector-register-bitwidth=256 \
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; RUN: -polly-target-2nd-cache-level-size=262144 -polly-ast \
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; RUN: -analyze < %s | FileCheck %s --check-prefix=PATTERN-MATCHING-OPTS
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; REQUIRES: asserts
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;
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; C := A * B + C
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; Check that the pattern matching optimizations can detect different
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; permutations of GEMM loop and produce the correct ISL AST. In this case,
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; dimensions of band nodes can be implicitly permuted by the algorithm
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; applied during the schedule generation. It should be taken into the
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; account during the pattern matching optimizations.
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; for (i = 0; i < _PB_NI; i++)
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; for (k = 0; k < _PB_NK; ++k)
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; for (j = 0; j < _PB_NJ; j++)
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; C[i][j] += A[i][k] * B[k][j];
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;
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; CHECK: The matrix multiplication pattern was detected
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;
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; PATTERN-MATCHING-OPTS: // 1st level tiling - Tiles
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; PATTERN-MATCHING-OPTS-NEXT: for (int c1 = 0; c1 <= 3; c1 += 1) {
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; PATTERN-MATCHING-OPTS-NEXT: for (int c3 = 256 * c1; c3 <= 256 * c1 + 255; c3 += 1)
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; PATTERN-MATCHING-OPTS-NEXT: for (int c4 = 0; c4 <= 1023; c4 += 1)
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; PATTERN-MATCHING-OPTS-NEXT: CopyStmt_0(0, c3, c4);
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; PATTERN-MATCHING-OPTS-NEXT: for (int c2 = 0; c2 <= 10; c2 += 1) {
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; PATTERN-MATCHING-OPTS-NEXT: for (int c3 = 96 * c2; c3 <= min(1023, 96 * c2 + 95); c3 += 1)
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; PATTERN-MATCHING-OPTS-NEXT: for (int c4 = 256 * c1; c4 <= 256 * c1 + 255; c4 += 1)
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; PATTERN-MATCHING-OPTS-NEXT: CopyStmt_1(c3, c4, 0);
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; PATTERN-MATCHING-OPTS-NEXT: // 1st level tiling - Points
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; PATTERN-MATCHING-OPTS-NEXT: // Register tiling - Tiles
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; PATTERN-MATCHING-OPTS-NEXT: for (int c3 = 0; c3 <= 127; c3 += 1)
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; PATTERN-MATCHING-OPTS-NEXT: for (int c4 = 0; c4 <= min(23, -24 * c2 + 255); c4 += 1)
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; PATTERN-MATCHING-OPTS-NEXT: for (int c5 = 0; c5 <= 255; c5 += 1) {
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; PATTERN-MATCHING-OPTS-NEXT: // Loop Vectorizer Disabled
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; PATTERN-MATCHING-OPTS-NEXT: // Register tiling - Points
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; PATTERN-MATCHING-OPTS-NEXT: {
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4, 256 * c1 + c5, 8 * c3);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4, 256 * c1 + c5, 8 * c3 + 1);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4, 256 * c1 + c5, 8 * c3 + 2);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4, 256 * c1 + c5, 8 * c3 + 3);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4, 256 * c1 + c5, 8 * c3 + 4);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4, 256 * c1 + c5, 8 * c3 + 5);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4, 256 * c1 + c5, 8 * c3 + 6);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4, 256 * c1 + c5, 8 * c3 + 7);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 1, 256 * c1 + c5, 8 * c3);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 1, 256 * c1 + c5, 8 * c3 + 1);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 1, 256 * c1 + c5, 8 * c3 + 2);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 1, 256 * c1 + c5, 8 * c3 + 3);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 1, 256 * c1 + c5, 8 * c3 + 4);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 1, 256 * c1 + c5, 8 * c3 + 5);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 1, 256 * c1 + c5, 8 * c3 + 6);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 1, 256 * c1 + c5, 8 * c3 + 7);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 2, 256 * c1 + c5, 8 * c3);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 2, 256 * c1 + c5, 8 * c3 + 1);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 2, 256 * c1 + c5, 8 * c3 + 2);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 2, 256 * c1 + c5, 8 * c3 + 3);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 2, 256 * c1 + c5, 8 * c3 + 4);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 2, 256 * c1 + c5, 8 * c3 + 5);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 2, 256 * c1 + c5, 8 * c3 + 6);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 2, 256 * c1 + c5, 8 * c3 + 7);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 3, 256 * c1 + c5, 8 * c3);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 3, 256 * c1 + c5, 8 * c3 + 1);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 3, 256 * c1 + c5, 8 * c3 + 2);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 3, 256 * c1 + c5, 8 * c3 + 3);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 3, 256 * c1 + c5, 8 * c3 + 4);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 3, 256 * c1 + c5, 8 * c3 + 5);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 3, 256 * c1 + c5, 8 * c3 + 6);
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; PATTERN-MATCHING-OPTS-NEXT: Stmt_for_body6(96 * c2 + 4 * c4 + 3, 256 * c1 + c5, 8 * c3 + 7);
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; PATTERN-MATCHING-OPTS-NEXT: }
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; PATTERN-MATCHING-OPTS-NEXT: }
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; PATTERN-MATCHING-OPTS-NEXT: }
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; PATTERN-MATCHING-OPTS-NEXT: }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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define internal void @kernel_gemm(i32 %ni, i32 %nj, i32 %nk, double %alpha, double %beta, [1024 x double]* %C, [1024 x double]* %A, [1024 x double]* %B) {
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entry:
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br label %entry.split
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entry.split: ; preds = %entry
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br label %for.cond1.preheader
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for.cond1.preheader: ; preds = %for.inc20, %entry.split
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%indvars.iv41 = phi i64 [ 0, %entry.split ], [ %indvars.iv.next42, %for.inc20 ]
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br label %for.cond4.preheader
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for.cond4.preheader: ; preds = %for.inc17, %for.cond1.preheader
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%indvars.iv38 = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next39, %for.inc17 ]
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br label %for.body6
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for.body6: ; preds = %for.body6, %for.cond4.preheader
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%indvars.iv = phi i64 [ 0, %for.cond4.preheader ], [ %indvars.iv.next, %for.body6 ]
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%arrayidx8 = getelementptr inbounds [1024 x double], [1024 x double]* %A, i64 %indvars.iv41, i64 %indvars.iv38
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%tmp = load double, double* %arrayidx8, align 8
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%arrayidx12 = getelementptr inbounds [1024 x double], [1024 x double]* %B, i64 %indvars.iv38, i64 %indvars.iv
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%tmp1 = load double, double* %arrayidx12, align 8
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%mul = fmul double %tmp, %tmp1
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%arrayidx16 = getelementptr inbounds [1024 x double], [1024 x double]* %C, i64 %indvars.iv41, i64 %indvars.iv
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%tmp2 = load double, double* %arrayidx16, align 8
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%add = fadd double %tmp2, %mul
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store double %add, double* %arrayidx16, align 8
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp ne i64 %indvars.iv.next, 1024
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br i1 %exitcond, label %for.body6, label %for.inc17
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for.inc17: ; preds = %for.body6
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%indvars.iv.next39 = add nuw nsw i64 %indvars.iv38, 1
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%exitcond40 = icmp ne i64 %indvars.iv.next39, 1024
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br i1 %exitcond40, label %for.cond4.preheader, label %for.inc20
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for.inc20: ; preds = %for.inc17
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%indvars.iv.next42 = add nuw nsw i64 %indvars.iv41, 1
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%exitcond43 = icmp ne i64 %indvars.iv.next42, 1024
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br i1 %exitcond43, label %for.cond1.preheader, label %for.end22
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for.end22: ; preds = %for.inc20
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ret void
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}
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