forked from OSchip/llvm-project
144 lines
5.2 KiB
C++
144 lines
5.2 KiB
C++
//=- MachineLoopUtils.cpp - Functions for manipulating loops ----------------=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineLoopUtils.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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using namespace llvm;
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namespace {
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// MI's parent and BB are clones of each other. Find the equivalent copy of MI
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// in BB.
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MachineInstr &findEquivalentInstruction(MachineInstr &MI,
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MachineBasicBlock *BB) {
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MachineBasicBlock *PB = MI.getParent();
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unsigned Offset = std::distance(PB->instr_begin(), MachineBasicBlock::instr_iterator(MI));
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return *std::next(BB->instr_begin(), Offset);
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}
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} // namespace
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MachineBasicBlock *llvm::PeelSingleBlockLoop(LoopPeelDirection Direction,
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MachineBasicBlock *Loop,
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MachineRegisterInfo &MRI,
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const TargetInstrInfo *TII) {
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MachineFunction &MF = *Loop->getParent();
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MachineBasicBlock *Preheader = *Loop->pred_begin();
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if (Preheader == Loop)
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Preheader = *std::next(Loop->pred_begin());
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MachineBasicBlock *Exit = *Loop->succ_begin();
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if (Exit == Loop)
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Exit = *std::next(Loop->succ_begin());
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MachineBasicBlock *NewBB = MF.CreateMachineBasicBlock(Loop->getBasicBlock());
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if (Direction == LPD_Front)
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MF.insert(Loop->getIterator(), NewBB);
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else
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MF.insert(std::next(Loop->getIterator()), NewBB);
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DenseMap<Register, Register> Remaps;
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auto InsertPt = NewBB->end();
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for (MachineInstr &MI : *Loop) {
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MachineInstr *NewMI = MF.CloneMachineInstr(&MI);
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NewBB->insert(InsertPt, NewMI);
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for (MachineOperand &MO : NewMI->defs()) {
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Register OrigR = MO.getReg();
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if (OrigR.isPhysical())
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continue;
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Register &R = Remaps[OrigR];
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R = MRI.createVirtualRegister(MRI.getRegClass(OrigR));
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MO.setReg(R);
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if (Direction == LPD_Back) {
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// Replace all uses outside the original loop with the new register.
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// FIXME: is the use_iterator stable enough to mutate register uses
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// while iterating?
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SmallVector<MachineOperand *, 4> Uses;
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for (auto &Use : MRI.use_operands(OrigR))
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if (Use.getParent()->getParent() != Loop)
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Uses.push_back(&Use);
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for (auto *Use : Uses) {
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MRI.constrainRegClass(R, MRI.getRegClass(Use->getReg()));
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Use->setReg(R);
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}
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}
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}
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}
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for (auto I = NewBB->getFirstNonPHI(); I != NewBB->end(); ++I)
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for (MachineOperand &MO : I->uses())
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if (MO.isReg() && Remaps.count(MO.getReg()))
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MO.setReg(Remaps[MO.getReg()]);
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for (auto I = NewBB->begin(); I->isPHI(); ++I) {
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MachineInstr &MI = *I;
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unsigned LoopRegIdx = 3, InitRegIdx = 1;
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if (MI.getOperand(2).getMBB() != Preheader)
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std::swap(LoopRegIdx, InitRegIdx);
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MachineInstr &OrigPhi = findEquivalentInstruction(MI, Loop);
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assert(OrigPhi.isPHI());
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if (Direction == LPD_Front) {
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// When peeling front, we are only left with the initial value from the
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// preheader.
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Register R = MI.getOperand(LoopRegIdx).getReg();
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if (Remaps.count(R))
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R = Remaps[R];
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OrigPhi.getOperand(InitRegIdx).setReg(R);
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MI.RemoveOperand(LoopRegIdx + 1);
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MI.RemoveOperand(LoopRegIdx + 0);
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} else {
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// When peeling back, the initial value is the loop-carried value from
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// the original loop.
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Register LoopReg = OrigPhi.getOperand(LoopRegIdx).getReg();
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MI.getOperand(LoopRegIdx).setReg(LoopReg);
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MI.RemoveOperand(InitRegIdx + 1);
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MI.RemoveOperand(InitRegIdx + 0);
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}
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}
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DebugLoc DL;
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if (Direction == LPD_Front) {
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Preheader->replaceSuccessor(Loop, NewBB);
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NewBB->addSuccessor(Loop);
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Loop->replacePhiUsesWith(Preheader, NewBB);
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if (TII->removeBranch(*Preheader) > 0)
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TII->insertBranch(*Preheader, NewBB, nullptr, {}, DL);
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TII->removeBranch(*NewBB);
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TII->insertBranch(*NewBB, Loop, nullptr, {}, DL);
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} else {
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Loop->replaceSuccessor(Exit, NewBB);
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Exit->replacePhiUsesWith(Loop, NewBB);
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NewBB->addSuccessor(Exit);
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MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
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SmallVector<MachineOperand, 4> Cond;
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bool CanAnalyzeBr = !TII->analyzeBranch(*Loop, TBB, FBB, Cond);
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(void)CanAnalyzeBr;
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assert(CanAnalyzeBr && "Must be able to analyze the loop branch!");
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TII->removeBranch(*Loop);
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TII->insertBranch(*Loop, TBB == Exit ? NewBB : TBB,
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FBB == Exit ? NewBB : FBB, Cond, DL);
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if (TII->removeBranch(*NewBB) > 0)
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TII->insertBranch(*NewBB, Exit, nullptr, {}, DL);
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}
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return NewBB;
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}
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bool llvm::isRegLiveInExitBlocks(MachineLoop *Loop, int PhysReg) {
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SmallVector<MachineBasicBlock *, 4> ExitBlocks;
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Loop->getExitBlocks(ExitBlocks);
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for (auto *MBB : ExitBlocks)
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if (MBB->isLiveIn(PhysReg))
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return true;
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return false;
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}
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