forked from OSchip/llvm-project
113 lines
4.7 KiB
ArmAsm
113 lines
4.7 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t2
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// RUN: ld.lld %t1 %t2 -o %t
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// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t | FileCheck %s
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// RUN: ld.lld --hash-style=sysv -shared %t1 %t2 -o %t3
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// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSOTHUMB %s
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// RUN: llvm-objdump -triple=armv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSOARM %s
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// RUN: llvm-readobj -s -r %t3 | FileCheck -check-prefix=DSOREL %s
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//
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// Test PLT entry generation
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.syntax unified
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.text
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.align 2
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.globl _start
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.type _start,%function
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_start:
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// FIXME, interworking is only supported for BL via BLX at the moment, when
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// interworking thunks are available for b.w and b<cond>.w this can be altered
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// to test the different forms of interworking.
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bl func1
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bl func2
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bl func3
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// Executable, expect no PLT
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// CHECK: Disassembly of section .text:
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// CHECK-NEXT: func1:
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// CHECK-NEXT: 11000: 70 47 bx lr
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// CHECK: func2:
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// CHECK-NEXT: 11002: 70 47 bx lr
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// CHECK: func3:
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// CHECK-NEXT: 11004: 70 47 bx lr
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// CHECK-NEXT: 11006: d4 d4
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// CHECK: _start:
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// 11008 + 4 -12 = 0x11000 = func1
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// CHECK-NEXT: 11008: ff f7 fa ff bl #-12
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// 1100c + 4 -14 = 0x11002 = func2
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// CHECK-NEXT: 1100c: ff f7 f9 ff bl #-14
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// 11010 + 4 -16 = 0x11004 = func3
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// CHECK-NEXT: 11010: ff f7 f8 ff bl #-16
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// Expect PLT entries as symbols can be preempted
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// .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble
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// as ARM or Thumb. Work around by disassembling twice.
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// DSOTHUMB: Disassembly of section .text:
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// DSOTHUMB-NEXT: func1:
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// DSOTHUMB-NEXT: 1000: 70 47 bx lr
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// DSOTHUMB: func2:
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// DSOTHUMB-NEXT: 1002: 70 47 bx lr
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// DSOTHUMB: func3:
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// DSOTHUMB-NEXT: 1004: 70 47 bx lr
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// DSOTHUMB-NEXT: 1006: d4 d4 bmi #-88
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// DSOTHUMB: _start:
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// 0x1008 + 0x34 + 4 = 0x1040 = PLT func1
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// DSOTHUMB-NEXT: 1008: 00 f0 1a e8 blx #52
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// 0x100c + 0x40 + 4 = 0x1050 = PLT func2
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// DSOTHUMB-NEXT: 100c: 00 f0 20 e8 blx #64
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// 0x1010 + 0x4C + 4 = 0x1060 = PLT func3
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// DSOTHUMB-NEXT: 1010: 00 f0 26 e8 blx #76
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// DSOARM: Disassembly of section .plt:
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// DSOARM-NEXT: $a:
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// DSOARM-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]!
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// (0x1024 + 8) + (0 RoR 12) + (0 RoR 20) + (0xfdc) = 0x2008 = .got.plt[3]
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// DSOARM-NEXT: 1024: 00 e6 8f e2 add lr, pc, #0, #12
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// DSOARM-NEXT: 1028: 00 ea 8e e2 add lr, lr, #0, #20
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// DSOARM-NEXT: 102c: dc ff be e5 ldr pc, [lr, #4060]!
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// DSOARM: $d:
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// DSOARM-NEXT: 1030: d4 d4 d4 d4 .word 0xd4d4d4d4
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// DSOARM-NEXT: 1034: d4 d4 d4 d4 .word 0xd4d4d4d4
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// DSOARM-NEXT: 1038: d4 d4 d4 d4 .word 0xd4d4d4d4
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// DSOARM-NEXT: 103c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// DSOARM: $a:
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// (0x1040 + 8) + (0 RoR 12) + (0 RoR 20) + (0xfc4) = 0x200c
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// DSOARM-NEXT: 1040: 00 c6 8f e2 add r12, pc, #0, #12
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// DSOARM-NEXT: 1044: 00 ca 8c e2 add r12, r12, #0, #20
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// DSOARM-NEXT: 1048: c4 ff bc e5 ldr pc, [r12, #4036]!
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// DSOARM: $d:
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// DSOARM-NEXT: 104c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// DSOARM: $a:
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// (0x1050 + 8) + (0 RoR 12) + (0 RoR 20) + (0xfb8) = 0x2010
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// DSOARM-NEXT: 1050: 00 c6 8f e2 add r12, pc, #0, #12
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// DSOARM-NEXT: 1054: 00 ca 8c e2 add r12, r12, #0, #20
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// DSOARM-NEXT: 1058: b8 ff bc e5 ldr pc, [r12, #4024]!
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// DSOARM: $d:
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// DSOARM-NEXT: 105c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// DSOARM: $a:
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// (0x1060 + 8) + (0 RoR 12) + (0 RoR 20) + (0xfac) = 0x2014
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// DSOARM-NEXT: 1060: 00 c6 8f e2 add r12, pc, #0, #12
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// DSOARM-NEXT: 1064: 00 ca 8c e2 add r12, r12, #0, #20
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// DSOARM-NEXT: 1068: ac ff bc e5 ldr pc, [r12, #4012]!
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// DSOARM: $d:
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// DSOARM-NEXT: 106c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// DSOREL: Name: .got.plt
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// DSOREL-NEXT: Type: SHT_PROGBITS
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// DSOREL-NEXT: Flags [
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// DSOREL-NEXT: SHF_ALLOC
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// DSOREL-NEXT: SHF_WRITE
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// DSOREL-NEXT: ]
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// DSOREL-NEXT: Address: 0x2000
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// DSOREL-NEXT: Offset:
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// DSOREL-NEXT: Size: 24
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// DSOREL-NEXT: Link:
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// DSOREL-NEXT: Info:
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// DSOREL-NEXT: AddressAlignment: 4
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// DSOREL-NEXT: EntrySize:
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// DSOREL: Relocations [
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// DSOREL-NEXT: Section (4) .rel.plt {
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// DSOREL-NEXT: 0x200C R_ARM_JUMP_SLOT func1 0x0
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// DSOREL-NEXT: 0x2010 R_ARM_JUMP_SLOT func2 0x0
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// DSOREL-NEXT: 0x2014 R_ARM_JUMP_SLOT func3 0x0
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