forked from OSchip/llvm-project
131 lines
5.1 KiB
LLVM
131 lines
5.1 KiB
LLVM
; Check VMX 128-bit integer operations
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;
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; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s
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define <1 x i128> @test_add(<1 x i128> %x, <1 x i128> %y) nounwind {
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%result = add <1 x i128> %x, %y
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ret <1 x i128> %result
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; CHECK-LABEL: @test_add
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; CHECK: vadduqm 2, 2, 3
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}
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define <1 x i128> @increment_by_one(<1 x i128> %x) nounwind {
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%result = add <1 x i128> %x, <i128 1>
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ret <1 x i128> %result
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; CHECK-LABEL: @increment_by_one
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; CHECK vadduqm 2, 2, 3
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}
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define <1 x i128> @increment_by_val(<1 x i128> %x, i128 %val) nounwind {
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%tmpvec = insertelement <1 x i128> <i128 0>, i128 %val, i32 0
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%tmpvec2 = insertelement <1 x i128> %tmpvec, i128 %val, i32 1
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%result = add <1 x i128> %x, %tmpvec2
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ret <1 x i128> %result
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; CHECK-LABEL: @increment_by_val
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; CHECK: vadduqm 2, 2, 3
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}
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define <1 x i128> @test_sub(<1 x i128> %x, <1 x i128> %y) nounwind {
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%result = sub <1 x i128> %x, %y
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ret <1 x i128> %result
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; CHECK-LABEL: @test_sub
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; CHECK: vsubuqm 2, 2, 3
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}
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define <1 x i128> @decrement_by_one(<1 x i128> %x) nounwind {
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%result = sub <1 x i128> %x, <i128 1>
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ret <1 x i128> %result
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; CHECK-LABEL: @decrement_by_one
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; CHECK vsubuqm 2, 2, 3
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}
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define <1 x i128> @decrement_by_val(<1 x i128> %x, i128 %val) nounwind {
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%tmpvec = insertelement <1 x i128> <i128 0>, i128 %val, i32 0
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%tmpvec2 = insertelement <1 x i128> %tmpvec, i128 %val, i32 1
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%result = sub <1 x i128> %x, %tmpvec2
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ret <1 x i128> %result
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; CHECK-LABEL: @decrement_by_val
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; CHECK vsubuqm 2, 2, 3
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}
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declare <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z) nounwind readnone
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declare <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> %x,
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<1 x i128> %y) nounwind readnone
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declare <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z) nounwind readnone
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declare <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z) nounwind readnone
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declare <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> %x,
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<1 x i128> %y) nounwind readnone
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declare <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z) nounwind readnone
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define <1 x i128> @test_vaddeuqm(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z) nounwind {
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%tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z)
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ret <1 x i128> %tmp
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; CHECK-LABEL: @test_vaddeuqm
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; CHECK: vaddeuqm 2, 2, 3, 4
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}
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define <1 x i128> @test_vaddcuq(<1 x i128> %x,
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<1 x i128> %y) nounwind {
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%tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> %x,
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<1 x i128> %y)
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ret <1 x i128> %tmp
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; CHECK-LABEL: @test_vaddcuq
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; CHECK: vaddcuq 2, 2, 3
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}
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define <1 x i128> @test_vaddecuq(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z) nounwind {
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%tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z)
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ret <1 x i128> %tmp
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; CHECK-LABEL: @test_vaddecuq
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; CHECK: vaddecuq 2, 2, 3, 4
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}
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define <1 x i128> @test_vsubeuqm(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z) nounwind {
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%tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z)
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ret <1 x i128> %tmp
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; CHECK-LABEL: test_vsubeuqm
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; CHECK: vsubeuqm 2, 2, 3, 4
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}
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define <1 x i128> @test_vsubcuq(<1 x i128> %x,
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<1 x i128> %y) nounwind {
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%tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> %x,
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<1 x i128> %y)
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ret <1 x i128> %tmp
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; CHECK-LABEL: test_vsubcuq
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; CHECK: vsubcuq 2, 2, 3
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}
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define <1 x i128> @test_vsubecuq(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z) nounwind {
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%tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> %x,
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<1 x i128> %y,
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<1 x i128> %z)
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ret <1 x i128> %tmp
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; CHECK-LABEL: test_vsubecuq
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; CHECK: vsubecuq 2, 2, 3, 4
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}
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