llvm-project/llvm/test/MC
Wouter van Oortmerssen 5c38ae36c5 [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION
A struct in C passed by value did not get debug information. Such values are currently
lowered to a Wasm local even in -O0 (not to an alloca like on other archs), which becomes
a Target Index operand (TI_LOCAL). The DWARF writing code was not emitting locations
in for TI's specifically if the location is a single range (not a list).

In addition, the ExplicitLocals pass which removes the ARGUMENT pseudo instructions did
not update the associated DBG_VALUEs, and couldn't even find these values since the code
assumed such instructions are adjacent, which is not the case here.

Also fixed asm printing of TIs needed by a test.

Differential Revision: https://reviews.llvm.org/D94140
2021-01-07 10:31:38 -08:00
..
AArch64 [AArch64] Add BRB IALL and BRB INJ instructions 2021-01-06 12:10:22 +00:00
AMDGPU [AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10 2021-01-05 11:59:57 -05:00
ARM [llvm-readobj] - For SHT_REL relocations, don't display an addend. 2020-12-14 12:03:00 +03:00
AVR [AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex 2020-07-12 08:14:52 -07:00
AsmParser [AsmParser] make .ascii support spaces as separators 2020-12-20 22:41:00 -08:00
BPF [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
COFF [CodeView] Fix inline sites that are missing code offsets. 2020-12-07 13:01:53 -08:00
Disassembler [WebAssembly][SIMD] Rename shuffle, swizzle, and load_splats 2020-12-22 14:29:06 -08:00
ELF [MC][test] Reorganize .cfi_* tests 2020-12-21 17:18:28 -08:00
Hexagon [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Lanai
MSP430 [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
MachO [Triple][MachO] Define "arm64e", an AArch64 subarch for Pointer Auth. 2020-12-03 07:53:59 -08:00
Mips [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets 2020-12-20 18:37:14 -08:00
PowerPC [PowerPC] Add addtional test that retroactively catches PR47259 2020-12-30 15:23:48 -06:00
RISCV [RISCV] Don't parse 'vmsltu.vi v0, v1, 0' as 'vmsleu.vi v0, v1, -1' 2021-01-05 10:59:30 -08:00
Sparc [Sparc] Fixes for the internal assembler 2021-01-04 13:25:37 +01:00
SystemZ [SystemZ] Adding extra extended mnemonics for SystemZ target 2020-12-02 08:25:31 -05:00
VE [VE] Add missing BCR format 2020-10-29 23:30:49 +09:00
WebAssembly [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION 2021-01-07 10:31:38 -08:00
X86 [X86] Update tests for znver3 2021-01-07 11:51:50 +05:30