forked from OSchip/llvm-project
87 lines
3.0 KiB
YAML
87 lines
3.0 KiB
YAML
# REQUIRES: asserts
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# RUN: llc -mtriple=amdgcn--- -verify-machineinstrs -debug-only=regalloc -run-pass=greedy -o /dev/null %s 2>&1 | FileCheck %s
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---
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# Check that physreg candidate is not used since cannot be spilled in a block,
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# e.g. before exec mask preamble
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# CHECK: , cannot spill all interferences.
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name: foo
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tracksRegLiveness: true
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machineFunctionInfo:
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scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
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stackPtrOffsetReg: $sgpr32
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body: |
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bb.0:
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liveins: $sgpr96_sgpr97, $sgpr98_sgpr99, $sgpr100_sgpr101, $sgpr102_sgpr103
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%0:sreg_64 = COPY $sgpr102_sgpr103
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%1:sgpr_128 = COPY $sgpr100_sgpr101_sgpr102_sgpr103
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%2:sgpr_128 = COPY %1
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%3:sgpr_128 = COPY %1
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%4:sgpr_128 = COPY %1
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%5:sgpr_128 = COPY %1
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%6:sgpr_128 = COPY %1
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%7:sgpr_128 = COPY %1
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%8:sgpr_128 = COPY %1
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%9:sgpr_128 = COPY %1
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%10:sgpr_128 = COPY %1
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%11:sgpr_128 = COPY %1
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%12:sgpr_128 = COPY %1
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%13:sgpr_128 = COPY %1
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%14:sgpr_128 = COPY %1
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%15:sgpr_128 = COPY %1
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%16:sgpr_128 = COPY %1
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%17:sgpr_128 = COPY %1
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%18:sgpr_128 = COPY %1
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%19:sgpr_128 = COPY %1
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%20:sgpr_128 = COPY %1
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%21:sgpr_128 = COPY %1
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%22:sgpr_128 = COPY %1
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%23:sgpr_128 = COPY %1
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%24:sgpr_128 = COPY %1
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%25:sgpr_128 = COPY %1
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%26:sgpr_128 = COPY %1
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S_BRANCH %bb.1
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bb.1:
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liveins: $sgpr96_sgpr97, $sgpr98_sgpr99, $sgpr102_sgpr103
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%0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr96_sgpr97, implicit-def $exec, implicit-def $scc, implicit $exec
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$exec = S_XOR_B64_term $exec, %0, implicit-def $scc
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SI_MASK_BRANCH %bb.3, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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liveins: $sgpr98_sgpr99, $sgpr102_sgpr103
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%0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr98_sgpr99, implicit-def $exec, implicit-def $scc, implicit $exec
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$exec = S_XOR_B64_term $exec, %0, implicit-def $scc
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SI_MASK_BRANCH %bb.3, implicit $exec
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S_BRANCH %bb.4
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bb.3:
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liveins: $sgpr102_sgpr103
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%0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr102_sgpr103, implicit-def $exec, implicit-def $scc, implicit $exec
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$exec = S_XOR_B64_term $exec, %0, implicit-def $scc
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S_BRANCH %bb.4
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bb.4:
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S_CMP_EQ_U64 %1.sub0_sub1, %2.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %3.sub0_sub1, %4.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %5.sub0_sub1, %6.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %7.sub0_sub1, %8.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %9.sub0_sub1, %10.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %11.sub0_sub1, %12.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %13.sub0_sub1, %14.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %15.sub0_sub1, %16.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %17.sub0_sub1, %18.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %19.sub0_sub1, %20.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %21.sub0_sub1, %22.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %23.sub0_sub1, %24.sub2_sub3, implicit-def $scc
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S_CMP_EQ_U64 %25.sub0_sub1, %26.sub2_sub3, implicit-def $scc
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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S_SETPC_B64_return undef $sgpr30_sgpr31, implicit %0, implicit $vgpr0
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...
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