forked from OSchip/llvm-project
51 lines
2.3 KiB
YAML
51 lines
2.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=machine-scheduler -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
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# handleMove was called for the BUNDLE pseudo-instruction, but
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# considered it to be an instruction in the bundle. Make sure it
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# doesn't assert when the whole bundle is moved.
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---
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name: handleMove_bundle
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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memoryBound: false
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waveLimiter: false
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body: |
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bb.0:
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liveins: $sgpr4_sgpr5
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; GCN-LABEL: name: handleMove_bundle
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; GCN: liveins: $sgpr4_sgpr5
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; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5
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; GCN: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 0, 0, 0 :: (dereferenceable invariant load 4, align 16, addrspace 4)
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
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; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
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; GCN: DS_WRITE_B32_gfx9 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (store 4, addrspace 3)
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; GCN: $vgpr0 = COPY [[S_LOAD_DWORD_IMM]]
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; GCN: $m0 = S_MOV_B32 0
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; GCN: BUNDLE implicit $vgpr0, implicit $m0, implicit $exec {
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; GCN: DS_GWS_INIT $vgpr0, 11, implicit $m0, implicit $exec :: (store 4)
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; GCN: S_WAITCNT 0
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; GCN: }
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; GCN: DS_WRITE_B32_gfx9 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_2]], 0, 0, implicit $exec :: (store 4, addrspace 3)
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; GCN: S_ENDPGM 0
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%2:sgpr_64 = COPY $sgpr4_sgpr5
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%5:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %2, 0, 0, 0 :: (dereferenceable invariant load 4, align 16, addrspace 4)
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%6:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
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%7:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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DS_WRITE_B32_gfx9 %7, %6, 0, 0, implicit $exec :: (store 4, addrspace 3)
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$m0 = S_MOV_B32 0
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$vgpr0 = COPY %5
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BUNDLE implicit killed $vgpr0, implicit $m0, implicit $exec {
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DS_GWS_INIT $vgpr0, 11, implicit $m0, implicit $exec :: (store 4)
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S_WAITCNT 0
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}
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%8:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
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DS_WRITE_B32_gfx9 %7, %8, 0, 0, implicit $exec :: (store 4, addrspace 3)
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S_ENDPGM 0
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...
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