..
AArch64
Revert "[AArch64] Attempt to sink mul operands"
2021-01-14 17:28:18 +02:00
AMDGPU
[AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader
2021-01-13 13:29:05 +09:00
ARC
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ARM
[ARM] Add a pass that re-arranges blocks when there is a backwards WLS branch
2021-01-13 17:23:00 +00:00
AVR
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BPF
[BPF] support atomic instructions
2020-12-03 07:38:00 -08:00
Generic
Use unary CreateShuffleVector if possible
2020-12-30 22:36:08 +09:00
Hexagon
[Hexagon] Custom-widen SETCC's operands
2021-01-11 12:21:49 -06:00
Inputs
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Lanai
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MIR
[CodeGen] Try to make the print of memory operand alignment a little more user friendly.
2021-01-11 19:58:47 -08:00
MSP430
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Mips
[CodeGen] Try to make the print of memory operand alignment a little more user friendly.
2021-01-11 19:58:47 -08:00
NVPTX
[NFC] Disallow unused prefixes under llvm/test/CodeGen
2021-01-11 12:32:18 -08:00
PowerPC
[PowerPC] Try to fold sqrt/sdiv test results with the branch.
2021-01-14 02:15:19 +00:00
RISCV
Revert "[RISCV] Legalize select when Zbt extension available"
2021-01-14 16:44:34 +00:00
SPARC
[SPARC] Fix fp128 load/stores
2021-01-13 14:59:50 -08:00
SystemZ
[SystemZ] misched-cutoff tests can only be tested on non-NDEBUG (assertion) builds
2021-01-14 15:46:27 +00:00
Thumb
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Thumb2
[ARM] Add a pass that re-arranges blocks when there is a backwards WLS branch
2021-01-13 17:23:00 +00:00
VE
[VE] Update VELIntrinsic tests
2021-01-13 00:12:50 +09:00
WebAssembly
[LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve expansion of SETONE/SETUEQ on targets without SETO/SETUO.
2021-01-12 10:45:03 -08:00
WinCFGuard
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WinEH
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X86
[X86] Add the FSRM feature (Fast Short Rep Mov) to Zen3.
2021-01-14 10:47:33 -08:00
XCore
[test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:47:16 -08:00
lit.local.cfg
[NFC] Disallow unused prefixes under llvm/test/CodeGen
2021-01-11 12:32:18 -08:00
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