forked from OSchip/llvm-project
67 lines
1.7 KiB
LLVM
67 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64le -mcpu=pwr9 -verify-machineinstrs < %s | FileCheck %s
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define double @zot(i32* %arg, float* %arg1, i16* %arg2) {
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; CHECK-LABEL: zot:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: bc 12, 20, .LBB0_2
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; CHECK-NEXT: # %bb.1: # %bb3
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; CHECK-NEXT: lhz 5, 0(5)
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; CHECK-NEXT: rlwinm. 5, 5, 28, 30, 31
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; CHECK-NEXT: .LBB0_2: # %bb10
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; CHECK-NEXT: lfs 0, 0(4)
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; CHECK-NEXT: lwz 3, 0(3)
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; CHECK-NEXT: li 4, 2
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; CHECK-NEXT: fmr 1, 0
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; CHECK-NEXT: b .LBB0_4
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; CHECK-NEXT: .p2align 5
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; CHECK-NEXT: .LBB0_3: # %bb17
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; CHECK-NEXT: #
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; CHECK-NEXT: addi 4, 4, 1
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; CHECK-NEXT: .LBB0_4: # %bb17
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; CHECK-NEXT: #
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; CHECK-NEXT: cmpw 4, 3
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; CHECK-NEXT: bge 0, .LBB0_3
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; CHECK-NEXT: # %bb.5:
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; CHECK-NEXT: xsmuldp 1, 1, 0
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; CHECK-NEXT: b .LBB0_3
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bb:
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%tmp = load i32, i32* %arg, align 8
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br i1 undef, label %bb9, label %bb3
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bb3:
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%tmp4 = load i16, i16* %arg2, align 4
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%tmp5 = lshr i16 %tmp4, 4
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%tmp6 = and i16 %tmp5, 3
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%tmp7 = zext i16 %tmp6 to i32
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%tmp8 = icmp eq i16 %tmp6, 0
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br i1 %tmp8, label %bb9, label %bb10
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bb9:
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br label %bb10
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bb10:
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%tmp11 = phi i32 [ undef, %bb9 ], [ %tmp7, %bb3 ]
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%tmp12 = icmp sgt i32 %tmp11, 1
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br label %bb13
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bb13:
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%tmp14 = load float, float* %arg1, align 4
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%tmp15 = fpext float %tmp14 to double
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br label %bb16
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bb16:
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br label %bb17
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bb17:
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%tmp18 = phi i32 [ %tmp23, %bb17 ], [ 2, %bb16 ]
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%tmp19 = phi double [ %tmp22, %bb17 ], [ %tmp15, %bb16 ]
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%tmp20 = icmp slt i32 %tmp18, %tmp
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%tmp21 = fmul fast double %tmp19, %tmp15
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%tmp22 = select i1 %tmp20, double %tmp21, double %tmp19
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%tmp23 = add nuw i32 %tmp18, 1
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br label %bb17
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}
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declare double @ham()
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