forked from OSchip/llvm-project
68 lines
1.9 KiB
LLVM
68 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
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; RUN: -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
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; RUN: -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-32BIT
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declare i32 @llvm.ppc.mftbu()
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declare i32 @llvm.ppc.mfmsr()
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declare void @llvm.ppc.mtmsr(i32)
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@ula = external local_unnamed_addr global i64, align 8
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define dso_local zeroext i32 @test_mftbu() {
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; CHECK-LABEL: test_mftbu:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mftbu 3
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; CHECK-NEXT: clrldi 3, 3, 32
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; CHECK-NEXT: blr
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;
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; CHECK-32BIT-LABEL: test_mftbu:
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; CHECK-32BIT: # %bb.0: # %entry
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; CHECK-32BIT-NEXT: mftbu 3
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; CHECK-32BIT-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.mftbu()
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ret i32 %0
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}
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define dso_local i64 @test_mfmsr() {
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; CHECK-LABEL: test_mfmsr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mfmsr 3
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; CHECK-NEXT: clrldi 3, 3, 32
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; CHECK-NEXT: blr
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;
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; CHECK-32BIT-LABEL: test_mfmsr:
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; CHECK-32BIT: # %bb.0: # %entry
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; CHECK-32BIT-NEXT: mfmsr 4
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; CHECK-32BIT-NEXT: li 3, 0
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; CHECK-32BIT-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.mfmsr()
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%conv = zext i32 %0 to i64
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ret i64 %conv
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}
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define dso_local void @test_mtmsr() {
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; CHECK-LABEL: test_mtmsr:
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; CHECK: mtmsr 3
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; CHECK-NEXT: blr
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;
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; CHECK-32BIT-LABEL: test_mtmsr:
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; CHECK-32BIT: # %bb.0: # %entry
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; CHECK-32BIT-NEXT: lwz 3, L..C0(2) # @ula
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; CHECK-32BIT-NEXT: lwz 3, 4(3)
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; CHECK-32BIT-NEXT: mtmsr 3, 0
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; CHECK-32BIT-NEXT: blr
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entry:
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%0 = load i64, i64* @ula, align 8
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%conv = trunc i64 %0 to i32
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call void @llvm.ppc.mtmsr(i32 %conv)
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ret void
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}
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