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Silviu Baranga 7581d22512 [ARM/AArch64] Fix cost model for interleaved accesses 
Summary:
Fix the cost of interleaved accesses for ARM/AArch64.
We were calling getTypeAllocSize and using it to check
the number of bits, when we should have called
getTypeAllocSizeInBits instead.

This would pottentially cause the vectorizer to
generate loads/stores and shuffles which cannot
be matched with an interleaved access instruction.

No performance changes are expected for now since
matching/generating interleaved accesses is still
disabled by default.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11524

llvm-svn: 243270
 		2015-07-27 14:39:34 +00:00
..
AsmParser [AArch64] Implement add/adds/sub/subs/cmp/cmn with negative immediate aliases 2015-07-01 15:05:58 +00:00
Disassembler Change the last few internal StringRef triples into Triple objects. 2015-07-06 16:56:07 +00:00
InstPrinter Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MCTargetDesc MC: Remove MCSubtargetInfo() default constructor 2015-07-10 22:43:42 +00:00
TargetInfo AArch64: stop trying to take control of all UnknownArch triples. 2014-08-08 08:27:44 +00:00
Utils Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64.h [AArch64] Revert r239711 again. We need to discuss how to share code between AArch64 and ARM backend. 2015-06-15 01:56:40 +00:00
AArch64.td [AArch64] Define subtarget feature "reserve-x18", which is used to decide 2015-07-25 00:18:31 +00:00
AArch64A53Fix835769.cpp Use make_range(rbegin(), rend()) to allow foreach loops. NFC. 2015-07-24 21:13:43 +00:00
AArch64A57FPLoadBalancing.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
AArch64AddressTypePromotion.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
AArch64AdvSIMDScalarPass.cpp MachineInstr: Change return value of getOpcode() to unsigned. 2015-05-18 20:27:55 +00:00
AArch64AsmPrinter.cpp Clean up redundant copies of Triple objects. NFC 2015-06-16 15:44:21 +00:00
AArch64BranchRelaxation.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64CallingConvention.h Move most user of TargetMachine::getDataLayout to the Module one 2015-07-16 06:11:10 +00:00
AArch64CallingConvention.td Move most user of TargetMachine::getDataLayout to the Module one 2015-07-16 06:11:10 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64CollectLOH.cpp Change range-based for-loops to be -Wrange-loop-analysis clean. 2015-04-15 01:21:15 +00:00
AArch64ConditionOptimizer.cpp MachineInstr: Change return value of getOpcode() to unsigned. 2015-05-18 20:27:55 +00:00
AArch64ConditionalCompares.cpp MachineInstr: Remove unused parameter. 2015-05-19 21:22:20 +00:00
AArch64DeadRegisterDefinitionsPass.cpp Remove 'virtual' keyword from methods markedwith 'override' keyword. 2014-08-30 16:48:34 +00:00
AArch64ExpandPseudoInsts.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64FastISel.cpp [AArch64][FastISel] Always use an AND instruction when truncating to non-legal types. 2015-07-25 02:16:53 +00:00
AArch64FrameLowering.cpp Move most user of TargetMachine::getDataLayout to the Module one 2015-07-16 06:11:10 +00:00
AArch64FrameLowering.h PrologEpilogInserter: Rewrite API to determine callee save regsiters. 2015-07-14 17:17:13 +00:00
AArch64ISelDAGToDAG.cpp AArch64: add comment missed out from earlier patch. 2015-07-17 03:31:50 +00:00
AArch64ISelLowering.cpp When lowering vector shifts a check is performed to see if the value to shift by 2015-07-24 09:31:48 +00:00
AArch64ISelLowering.h AArch64: Implement conditional compare sequence matching. 2015-07-16 20:02:37 +00:00
AArch64InstrAtomics.td Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends 2014-08-18 16:48:58 +00:00
AArch64InstrFormats.td AArch64: Implement conditional compare sequence matching. 2015-07-16 20:02:37 +00:00
AArch64InstrInfo.cpp test commit, only added one space 2015-07-23 23:55:28 +00:00
AArch64InstrInfo.h name change: hasPattern() -> getMachineCombinerPatterns() ; NFC 2015-06-19 23:21:42 +00:00
AArch64InstrInfo.td [AArch64] Change EON pattern to match more often. 2015-07-20 18:42:27 +00:00
AArch64LoadStoreOptimizer.cpp Simplify switch as all cases other than default return true. NFC. 2015-07-22 18:41:57 +00:00
AArch64MCInstLower.cpp Use MCSymbols for FastISel. 2015-06-23 12:21:54 +00:00
AArch64MCInstLower.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64MachineCombinerPattern.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64MachineFunctionInfo.h WebAssembly: fix build breakage. 2015-07-14 23:06:07 +00:00
AArch64PBQPRegAlloc.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PBQPRegAlloc.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PerfectShuffle.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64PromoteConstant.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
AArch64RegisterInfo.cpp [AArch64] Define subtarget feature "reserve-x18", which is used to decide 2015-07-25 00:18:31 +00:00
AArch64RegisterInfo.h Targets: commonize some stack realignment code 2015-07-20 22:51:32 +00:00
AArch64RegisterInfo.td [AArch64] Add v8.1a atomic instructions 2015-06-02 10:58:41 +00:00
AArch64SchedA53.td Fix typos 2014-05-31 21:26:28 +00:00
AArch64SchedA57.td [AArch64] Changes some SchedAlias to WriteRes for Cortex-A57. 2015-04-10 13:19:27 +00:00
AArch64SchedA57WriteRes.td [AArch64] Refines the Cortex-A57 Machine Model 2014-09-29 21:27:36 +00:00
AArch64SchedCyclone.td AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00
AArch64Schedule.td AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00
AArch64SelectionDAGInfo.cpp Remove getDataLayout() from TargetSelectionDAGInfo (had no users) 2015-07-09 02:10:08 +00:00
AArch64SelectionDAGInfo.h Remove getDataLayout() from TargetSelectionDAGInfo (had no users) 2015-07-09 02:10:08 +00:00
AArch64StorePairSuppress.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64Subtarget.cpp [AArch64] Define subtarget feature "reserve-x18", which is used to decide 2015-07-25 00:18:31 +00:00
AArch64Subtarget.h [AArch64] Define subtarget feature "reserve-x18", which is used to decide 2015-07-25 00:18:31 +00:00
AArch64TargetMachine.cpp [AArch64] Lower interleaved memory accesses to ldN/stN intrinsics. This patch also adds a function to calculate the cost of interleaved memory accesses. 2015-06-26 02:32:07 +00:00
AArch64TargetMachine.h Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. 2015-06-11 19:41:26 +00:00
AArch64TargetObjectFile.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp [ARM/AArch64] Fix cost model for interleaved accesses 2015-07-27 14:39:34 +00:00
AArch64TargetTransformInfo.h Make TargetTransformInfo keeping a reference to the Module DataLayout 2015-07-09 02:08:42 +00:00
CMakeLists.txt [AArch64] Revert r239711 again. We need to discuss how to share code between AArch64 and ARM backend. 2015-06-15 01:56:40 +00:00
LLVMBuild.txt Re-commit of r238201 with fix for building with shared libraries. 2015-06-01 12:02:47 +00:00
Makefile AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00