llvm-project/llvm/lib/Target/SystemZ
Daniel Sanders 0c47611131 Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
Summary:
This clang-tidy check is looking for unsigned integer variables whose initializer
starts with an implicit cast from llvm::Register and changes the type of the
variable to llvm::Register (dropping the llvm:: where possible).

Partial reverts in:
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned&
MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register
PPCFastISel.cpp - No Register::operator-=()
PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned&
MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor

Manual fixups in:
ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned&
HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register
HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register.
PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned&

Depends on D65919

Reviewers: arsenm, bogner, craig.topper, RKSimon

Reviewed By: arsenm

Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65962

llvm-svn: 369041
2019-08-15 19:22:08 +00:00
..
AsmParser [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
Disassembler Revert CMake: Make most target symbols hidden by default 2019-06-11 03:21:13 +00:00
MCTargetDesc [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
TargetInfo Revert CMake: Make most target symbols hidden by default 2019-06-11 03:21:13 +00:00
CMakeLists.txt [SystemZ] Fix CMakeLists.txt for alphabetical order (NFC). 2019-06-08 06:42:02 +00:00
LLVMBuild.txt [SystemZ] Move InstPrinter files to MCTargetDesc. NFC 2019-05-11 03:36:16 +00:00
README.txt
SystemZ.h [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection. 2019-06-08 06:19:15 +00:00
SystemZ.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZAsmPrinter.cpp [SystemZ] Support vector load/store alignment hints 2019-06-19 14:20:00 +00:00
SystemZAsmPrinter.h [AsmPrinter] refactor to remove remove AsmVariant. NFC 2019-04-10 16:38:43 +00:00
SystemZCallingConv.cpp Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZCallingConv.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZCallingConv.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZConstantPoolValue.cpp Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZConstantPoolValue.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZElimCompare.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SystemZExpandPseudo.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SystemZFeatures.td [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZFrameLowering.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SystemZFrameLowering.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZHazardRecognizer.cpp Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZHazardRecognizer.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZISelDAGToDAG.cpp [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZISelLowering.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SystemZISelLowering.h [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZInstrBuilder.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZInstrDFP.td [SystemZ] Model floating-point control register 2019-05-13 09:47:26 +00:00
SystemZInstrFP.td Allow matching extend-from-memory with strict FP nodes 2019-06-26 17:19:12 +00:00
SystemZInstrFormats.td [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZInstrHFP.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZInstrInfo.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SystemZInstrInfo.h [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZInstrInfo.td [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZInstrSystem.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZInstrVector.td [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZLDCleanup.cpp Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZLongBranch.cpp Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZMCInstLower.cpp Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZMCInstLower.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZMachineFunctionInfo.cpp Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZMachineFunctionInfo.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZMachineScheduler.cpp Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZMachineScheduler.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZOperands.td [SystemZ] Improve codegen for certain SADDO-immediate cases 2019-04-03 15:09:19 +00:00
SystemZOperators.td [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZPatterns.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZPostRewrite.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SystemZProcessors.td [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZRegisterInfo.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SystemZRegisterInfo.h CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
SystemZRegisterInfo.td [SystemZ] Model floating-point control register 2019-05-13 09:47:26 +00:00
SystemZSchedule.td [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZScheduleArch13.td [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZScheduleZ13.td [SystemZ] Support vector load/store alignment hints 2019-06-19 14:20:00 +00:00
SystemZScheduleZ14.td [SystemZ] Support vector load/store alignment hints 2019-06-19 14:20:00 +00:00
SystemZScheduleZ196.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZScheduleZEC12.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZSelectionDAGInfo.cpp [SystemZ] Do not return INT_MIN from strcmp/memcmp 2019-02-06 15:10:13 +00:00
SystemZSelectionDAGInfo.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZShortenInst.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SystemZSubtarget.cpp [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZSubtarget.h [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZTDC.cpp [opaque pointer types] Pass function types to CallInst creation. 2019-02-01 20:43:25 +00:00
SystemZTargetMachine.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
SystemZTargetMachine.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
SystemZTargetTransformInfo.cpp [SystemZ] Add support for new cpu architecture - arch13 2019-07-12 18:13:16 +00:00
SystemZTargetTransformInfo.h Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces" 2019-07-10 18:25:58 +00:00

README.txt

//===---------------------------------------------------------------------===//
// Random notes about and ideas for the SystemZ backend.
//===---------------------------------------------------------------------===//

The initial backend is deliberately restricted to z10.  We should add support
for later architectures at some point.

--

If an inline asm ties an i32 "r" result to an i64 input, the input
will be treated as an i32, leaving the upper bits uninitialised.
For example:

define void @f4(i32 *%dst) {
  %val = call i32 asm "blah $0", "=r,0" (i64 103)
  store i32 %val, i32 *%dst
  ret void
}

from CodeGen/SystemZ/asm-09.ll will use LHI rather than LGHI.
to load 103.  This seems to be a general target-independent problem.

--

The tuning of the choice between LOAD ADDRESS (LA) and addition in
SystemZISelDAGToDAG.cpp is suspect.  It should be tweaked based on
performance measurements.

--

There is no scheduling support.

--

We don't use the BRANCH ON INDEX instructions.

--

We only use MVC, XC and CLC for constant-length block operations.
We could extend them to variable-length operations too,
using EXECUTE RELATIVE LONG.

MVCIN, MVCLE and CLCLE may be worthwhile too.

--

We don't use CUSE or the TRANSLATE family of instructions for string
operations.  The TRANSLATE ones are probably more difficult to exploit.

--

We don't take full advantage of builtins like fabsl because the calling
conventions require f128s to be returned by invisible reference.

--

ADD LOGICAL WITH SIGNED IMMEDIATE could be useful when we need to
produce a carry.  SUBTRACT LOGICAL IMMEDIATE could be useful when we
need to produce a borrow.  (Note that there are no memory forms of
ADD LOGICAL WITH CARRY and SUBTRACT LOGICAL WITH BORROW, so the high
part of 128-bit memory operations would probably need to be done
via a register.)

--

We don't use ICM, STCM, or CLM.

--

We don't use ADD (LOGICAL) HIGH, SUBTRACT (LOGICAL) HIGH,
or COMPARE (LOGICAL) HIGH yet.

--

DAGCombiner doesn't yet fold truncations of extended loads.  Functions like:

    unsigned long f (unsigned long x, unsigned short *y)
    {
      return (x << 32) | *y;
    }

therefore end up as:

        sllg    %r2, %r2, 32
        llgh    %r0, 0(%r3)
        lr      %r2, %r0
        br      %r14

but truncating the load would give:

        sllg    %r2, %r2, 32
        lh      %r2, 0(%r3)
        br      %r14

--

Functions like:

define i64 @f1(i64 %a) {
  %and = and i64 %a, 1
  ret i64 %and
}

ought to be implemented as:

        lhi     %r0, 1
        ngr     %r2, %r0
        br      %r14

but two-address optimizations reverse the order of the AND and force:

        lhi     %r0, 1
        ngr     %r0, %r2
        lgr     %r2, %r0
        br      %r14

CodeGen/SystemZ/and-04.ll has several examples of this.

--

Out-of-range displacements are usually handled by loading the full
address into a register.  In many cases it would be better to create
an anchor point instead.  E.g. for:

define void @f4a(i128 *%aptr, i64 %base) {
  %addr = add i64 %base, 524288
  %bptr = inttoptr i64 %addr to i128 *
  %a = load volatile i128 *%aptr
  %b = load i128 *%bptr
  %add = add i128 %a, %b
  store i128 %add, i128 *%aptr
  ret void
}

(from CodeGen/SystemZ/int-add-08.ll) we load %base+524288 and %base+524296
into separate registers, rather than using %base+524288 as a base for both.

--

Dynamic stack allocations round the size to 8 bytes and then allocate
that rounded amount.  It would be simpler to subtract the unrounded
size from the copy of the stack pointer and then align the result.
See CodeGen/SystemZ/alloca-01.ll for an example.

--

If needed, we can support 16-byte atomics using LPQ, STPQ and CSDG.

--

We might want to model all access registers and use them to spill
32-bit values.

--

We might want to use the 'overflow' condition of eg. AR to support
llvm.sadd.with.overflow.i32 and related instructions - the generated code
for signed overflow check is currently quite bad.  This would improve
the results of using -ftrapv.