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AArch64
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[AArch64] Fold more spilled/refilled COPYs.
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2016-12-01 23:43:55 +00:00 |
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AMDGPU
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AMDGPU: Use wider scalar spills for SGPR spilling
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2016-12-02 00:54:45 +00:00 |
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ARM
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When instructions are hoisted out of loops by MachineLICM, remove their debug loc.
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2016-12-02 00:37:57 +00:00 |
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AVR
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Un-XFAIL an AVR CodeGen test
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2016-11-26 01:07:32 +00:00 |
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BPF
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[bpf] attempt to fix big-endian bots
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2016-11-21 07:26:23 +00:00 |
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Generic
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Add -O0 support for @llvm.invariant.group.barrier by discarding it if it gets to ISel.
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2016-11-07 16:47:20 +00:00 |
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Hexagon
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[Hexagon] Remove unsafe load instructions that affect Stack Slot Coloring
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2016-11-14 17:11:00 +00:00 |
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Inputs
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…
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Lanai
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[lanai] Manually match 0/-1 with R0/R1.
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2016-11-29 23:01:09 +00:00 |
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MIR
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AMDGPU: Move mir tests into mir test directory
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2016-11-30 18:50:26 +00:00 |
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MSP430
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Fix PR27500: on MSP430 the branch destination offset is measured in words, not bytes.
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2016-11-08 17:19:59 +00:00 |
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Mips
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Revert "[DAG] Improve loads-from-store forwarding to handle TokenFactor"
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2016-11-28 14:30:29 +00:00 |
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NVPTX
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[NVPTX] Remove NVPTXFavorNonGenericAddrSpaces pass.
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2016-10-31 21:51:42 +00:00 |
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PowerPC
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Revert https://reviews.llvm.org/rL287679
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2016-11-29 23:00:33 +00:00 |
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SPARC
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ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()
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2016-11-11 01:34:21 +00:00 |
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SystemZ
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[SystemZ] Support load-and-trap instructions
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2016-11-28 13:59:22 +00:00 |
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Thumb
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Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently"
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2016-11-03 14:08:01 +00:00 |
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Thumb2
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Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently"
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2016-11-03 14:08:01 +00:00 |
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WebAssembly
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[WebAssembly] Emit .import_global assembler directives
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2016-12-01 00:11:15 +00:00 |
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WinEH
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…
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X86
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[AVX-512] Add masked VINSERTF/VINSERTI instructions to load folding tables.
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2016-12-02 06:24:38 +00:00 |
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XCore
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MCStreamer: Use "cfi" for CFI related temp labels.
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2016-11-30 23:48:26 +00:00 |
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