forked from OSchip/llvm-project
126 lines
2.6 KiB
LLVM
126 lines
2.6 KiB
LLVM
; RUN: llc -march=mips -mcpu=mips32 -verify-machineinstrs < %s | FileCheck %s -check-prefix=ALL -check-prefix=ACC -check-prefix=TRAP
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; RUN: llc -march=mips -mcpu=mips32 -mno-check-zero-division < %s | FileCheck %s -check-prefix=ALL -check-prefix=ACC -check-prefix=NOCHECK
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; FileCheck Prefixes:
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; ALL - All targets
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; ACC - Accumulator based multiply/divide. I.e. All ISA's before MIPS32r6
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; TRAP - Division must be explicitly checked for divide by zero
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; NOCHECK - Division by zero will not be detected
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@g0 = common global i32 0, align 4
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@g1 = common global i32 0, align 4
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define i32 @sdiv1(i32 %a0, i32 %a1) nounwind readnone {
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entry:
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; ALL-LABEL: sdiv1:
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; ACC: div $zero, $4, $5
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; TRAP: teq $5, $zero, 7
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; NOCHECK-NOT: teq
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; ACC: mflo $2
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; ALL: .end sdiv1
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%div = sdiv i32 %a0, %a1
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ret i32 %div
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}
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define i32 @srem1(i32 %a0, i32 %a1) nounwind readnone {
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entry:
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; ALL-LABEL: srem1:
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; ACC: div $zero, $4, $5
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; TRAP: teq $5, $zero, 7
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; NOCHECK-NOT: teq
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; ACC: mfhi $2
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; ALL: .end srem1
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%rem = srem i32 %a0, %a1
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ret i32 %rem
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}
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define i32 @udiv1(i32 %a0, i32 %a1) nounwind readnone {
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entry:
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; ALL-LABEL: udiv1:
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; ACC: divu $zero, $4, $5
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; TRAP: teq $5, $zero, 7
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; NOCHECK-NOT: teq
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; ACC: mflo $2
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; ALL: .end udiv1
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%div = udiv i32 %a0, %a1
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ret i32 %div
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}
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define i32 @urem1(i32 %a0, i32 %a1) nounwind readnone {
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entry:
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; ALL-LABEL: urem1:
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; ACC: divu $zero, $4, $5
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; TRAP: teq $5, $zero, 7
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; NOCHECK-NOT: teq
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; ACC: mfhi $2
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; ALL: .end urem1
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%rem = urem i32 %a0, %a1
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ret i32 %rem
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}
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define i32 @sdivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind {
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entry:
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; ALL-LABEL: sdivrem1:
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; ACC: div $zero, $4, $5
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; TRAP: teq $5, $zero, 7
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; NOCHECK-NOT: teq
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; ACC: mflo $2
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; ACC: mfhi $[[R0:[0-9]+]]
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; ACC: sw $[[R0]], 0(${{[0-9]+}})
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; ALL: .end sdivrem1
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%rem = srem i32 %a0, %a1
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store i32 %rem, i32* %r, align 4
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%div = sdiv i32 %a0, %a1
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ret i32 %div
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}
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define i32 @udivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind {
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entry:
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; ALL-LABEL: udivrem1:
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; ACC: divu $zero, $4, $5
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; TRAP: teq $5, $zero, 7
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; NOCHECK-NOT: teq
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; ACC: mflo $2
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; ACC: mfhi $[[R0:[0-9]+]]
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; ACC: sw $[[R0]], 0(${{[0-9]+}})
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; ALL: .end udivrem1
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%rem = urem i32 %a0, %a1
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store i32 %rem, i32* %r, align 4
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%div = udiv i32 %a0, %a1
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ret i32 %div
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}
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; FIXME: It's not clear what this is supposed to test.
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define i32 @killFlags() {
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entry:
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%0 = load i32* @g0, align 4
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%1 = load i32* @g1, align 4
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%div = sdiv i32 %0, %1
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ret i32 %div
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}
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