forked from OSchip/llvm-project
148 lines
4.1 KiB
C++
148 lines
4.1 KiB
C++
//===--- RISCV.h - Declare RISCV target feature support ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares RISCV TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/Compiler.h"
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namespace clang {
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namespace targets {
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// RISC-V Target
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class RISCVTargetInfo : public TargetInfo {
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protected:
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std::string ABI, CPU;
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bool HasM;
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bool HasA;
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bool HasF;
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bool HasD;
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bool HasC;
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bool HasB;
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public:
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RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
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: TargetInfo(Triple), HasM(false), HasA(false), HasF(false),
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HasD(false), HasC(false), HasB(false) {
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LongDoubleWidth = 128;
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LongDoubleAlign = 128;
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LongDoubleFormat = &llvm::APFloat::IEEEquad();
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SuitableAlign = 128;
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WCharType = SignedInt;
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WIntType = UnsignedInt;
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}
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bool setCPU(const std::string &Name) override {
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if (!isValidCPUName(Name))
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return false;
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CPU = Name;
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return true;
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}
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StringRef getABI() const override { return ABI; }
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override;
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ArrayRef<Builtin::Info> getTargetBuiltins() const override { return None; }
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BuiltinVaListKind getBuiltinVaListKind() const override {
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return TargetInfo::VoidPtrBuiltinVaList;
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}
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const char *getClobbers() const override { return ""; }
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ArrayRef<const char *> getGCCRegNames() const override;
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int getEHDataRegisterNumber(unsigned RegNo) const override {
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if (RegNo == 0)
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return 10;
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else if (RegNo == 1)
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return 11;
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else
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return -1;
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}
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ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
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bool validateAsmConstraint(const char *&Name,
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TargetInfo::ConstraintInfo &Info) const override;
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bool hasFeature(StringRef Feature) const override;
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bool handleTargetFeatures(std::vector<std::string> &Features,
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DiagnosticsEngine &Diags) override;
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bool hasExtIntType() const override { return true; }
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};
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class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo {
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public:
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RISCV32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
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: RISCVTargetInfo(Triple, Opts) {
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IntPtrType = SignedInt;
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PtrDiffType = SignedInt;
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SizeType = UnsignedInt;
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resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128");
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}
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bool setABI(const std::string &Name) override {
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if (Name == "ilp32" || Name == "ilp32f" || Name == "ilp32d") {
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ABI = Name;
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return true;
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}
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return false;
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}
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bool isValidCPUName(StringRef Name) const override;
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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void setMaxAtomicWidth() override {
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MaxAtomicPromoteWidth = 128;
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if (HasA)
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MaxAtomicInlineWidth = 32;
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}
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};
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class LLVM_LIBRARY_VISIBILITY RISCV64TargetInfo : public RISCVTargetInfo {
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public:
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RISCV64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
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: RISCVTargetInfo(Triple, Opts) {
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LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
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IntMaxType = Int64Type = SignedLong;
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resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128");
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}
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bool setABI(const std::string &Name) override {
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if (Name == "lp64" || Name == "lp64f" || Name == "lp64d") {
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ABI = Name;
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return true;
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}
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return false;
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}
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bool isValidCPUName(StringRef Name) const override;
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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void setMaxAtomicWidth() override {
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MaxAtomicPromoteWidth = 128;
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if (HasA)
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MaxAtomicInlineWidth = 64;
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}
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};
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} // namespace targets
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} // namespace clang
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#endif // LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
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