llvm-project/mlir/test
Rob Suderman 28e6420744 [mlir][tosa] Add tosa.argmax to linalg lowering
Tosa's argmax lowering is representable as a linalg.indexed_generic
operation. Include the lowering to this type for both integer and
floating point types.

Differential Revision: https://reviews.llvm.org/D99137
2021-03-23 16:06:55 -07:00
..
Analysis [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
Bindings [mlir][python] Adapt to `segment_sizes` attribute type change. 2021-03-19 18:47:00 -07:00
CAPI [mlir][IR] Move the remaining builtin attributes to ODS. 2021-03-16 16:31:53 -07:00
Conversion [mlir][tosa] Add tosa.argmax to linalg lowering 2021-03-23 16:06:55 -07:00
Dialect [MLIR][Linalg] Hoist padding across multiple levels of tiling 2021-03-23 17:47:32 +00:00
EDSC [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
Examples [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
IR [mlir] verify that operand/result_segment_sizes attributes have i32 element 2021-03-23 18:26:31 +01:00
Integration Update syntax for amx.tile_muli to use two Unit attr to mark the zext case 2021-03-20 04:12:24 +00:00
Interfaces/DataLayoutInterfaces [mlir] Introduce data layout modeling subsystem 2021-03-11 16:54:47 +01:00
Pass Avoid using /dev/null in test 2020-12-30 14:16:13 -08:00
Rewrite [mlir][PDL] Add support for variadic operands and results in the PDL byte code 2021-03-16 13:20:19 -07:00
SDBM Remove global dialect registration 2020-10-24 00:35:55 +00:00
Target Add arm_neon.sdot operation 2021-03-17 08:24:58 -07:00
Transforms [Canonicalizer] Process regions top-down instead of bottom up & reuse existing constants. 2021-03-20 16:30:15 -07:00
Unit [lit] Sort test start times based on prior test timing data 2021-03-16 05:23:04 -04:00
lib [mlir][Pattern] Add better support for using interfaces/traits to match root operations in rewrite patterns 2021-03-23 14:05:33 -07:00
mlir-cpu-runner [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
mlir-linalg-ods-gen [mlir][linalg] Add support for using scalar attributes in TC ops. 2021-03-10 01:51:12 -08:00
mlir-opt [mlir][amx] Add Intel AMX dialect (architectural-specific vector dialect) 2021-03-15 17:59:05 -07:00
mlir-reduce Fix the order of directives and the target string 2021-03-22 11:10:12 -07:00
mlir-spirv-cpu-runner [mlir] fix SPIR-V CPU and Vulkan runners after e2310704d8 2021-03-15 18:36:58 +01:00
mlir-tblgen [mlir][OpAsmFormat] Add support for an "else" group on optional elements 2021-03-22 18:19:23 -07:00
mlir-translate [mlir] Print the correct tool name in mlirTranslateMain 2021-01-05 19:17:01 -08:00
mlir-vulkan-runner [mlir] fix SPIR-V CPU and Vulkan runners after e2310704d8 2021-03-15 18:36:58 +01:00
APITest.h Mass update the MLIR license header to mention "Part of the LLVM project" 2020-01-26 03:58:30 +00:00
CMakeLists.txt [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00
lit.cfg.py [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00
lit.site.cfg.py.in [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00