forked from OSchip/llvm-project
207 lines
10 KiB
Plaintext
207 lines
10 KiB
Plaintext
// Tests the phases generated for a CUDA offloading target for different
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// combinations of:
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// - Number of gpu architectures;
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// - Host/device-only compilation;
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// - User-requested final phase - binary or assembly.
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// REQUIRES: clang-driver
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// REQUIRES: powerpc-registered-target
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// REQUIRES: nvptx-registered-target
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//
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// Test single gpu architecture with complete compilation.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 %s 2>&1 \
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// RUN: | FileCheck -check-prefix=BIN %s
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// BIN: 0: input, "{{.*}}cuda-phases.cu", cuda, (host-cuda)
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// BIN: 1: preprocessor, {0}, cuda-cpp-output, (host-cuda)
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// BIN: 2: compiler, {1}, ir, (host-cuda)
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// BIN: 3: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_30)
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// BIN: 4: preprocessor, {3}, cuda-cpp-output, (device-cuda, sm_30)
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// BIN: 5: compiler, {4}, ir, (device-cuda, sm_30)
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// BIN: 6: backend, {5}, assembler, (device-cuda, sm_30)
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// BIN: 7: assembler, {6}, object, (device-cuda, sm_30)
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// BIN: 8: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {7}, object
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// BIN: 9: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {6}, assembler
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// BIN: 10: linker, {8, 9}, cuda-fatbin, (device-cuda)
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// BIN: 11: offload, "host-cuda (powerpc64le-ibm-linux-gnu)" {2}, "device-cuda (nvptx64-nvidia-cuda)" {10}, ir
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// BIN: 12: backend, {11}, assembler, (host-cuda)
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// BIN: 13: assembler, {12}, object, (host-cuda)
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// BIN: 14: linker, {13}, image, (host-cuda)
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//
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// Test single gpu architecture up to the assemble phase.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 %s -S 2>&1 \
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// RUN: | FileCheck -check-prefix=ASM %s
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// ASM: 0: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_30)
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// ASM: 1: preprocessor, {0}, cuda-cpp-output, (device-cuda, sm_30)
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// ASM: 2: compiler, {1}, ir, (device-cuda, sm_30)
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// ASM: 3: backend, {2}, assembler, (device-cuda, sm_30)
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// ASM: 4: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {3}, assembler
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// ASM: 5: input, "{{.*}}cuda-phases.cu", cuda, (host-cuda)
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// ASM: 6: preprocessor, {5}, cuda-cpp-output, (host-cuda)
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// ASM: 7: compiler, {6}, ir, (host-cuda)
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// ASM: 8: backend, {7}, assembler, (host-cuda)
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//
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// Test two gpu architectures with complete compilation.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 --cuda-gpu-arch=sm_35 %s 2>&1 \
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// RUN: | FileCheck -check-prefix=BIN2 %s
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// BIN2: 0: input, "{{.*}}cuda-phases.cu", cuda, (host-cuda)
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// BIN2: 1: preprocessor, {0}, cuda-cpp-output, (host-cuda)
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// BIN2: 2: compiler, {1}, ir, (host-cuda)
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// BIN2: 3: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_30)
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// BIN2: 4: preprocessor, {3}, cuda-cpp-output, (device-cuda, sm_30)
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// BIN2: 5: compiler, {4}, ir, (device-cuda, sm_30)
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// BIN2: 6: backend, {5}, assembler, (device-cuda, sm_30)
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// BIN2: 7: assembler, {6}, object, (device-cuda, sm_30)
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// BIN2: 8: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {7}, object
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// BIN2: 9: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {6}, assembler
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// BIN2: 10: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_35)
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// BIN2: 11: preprocessor, {10}, cuda-cpp-output, (device-cuda, sm_35)
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// BIN2: 12: compiler, {11}, ir, (device-cuda, sm_35)
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// BIN2: 13: backend, {12}, assembler, (device-cuda, sm_35)
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// BIN2: 14: assembler, {13}, object, (device-cuda, sm_35)
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// BIN2: 15: offload, "device-cuda (nvptx64-nvidia-cuda:sm_35)" {14}, object
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// BIN2: 16: offload, "device-cuda (nvptx64-nvidia-cuda:sm_35)" {13}, assembler
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// BIN2: 17: linker, {8, 9, 15, 16}, cuda-fatbin, (device-cuda)
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// BIN2: 18: offload, "host-cuda (powerpc64le-ibm-linux-gnu)" {2}, "device-cuda (nvptx64-nvidia-cuda)" {17}, ir
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// BIN2: 19: backend, {18}, assembler, (host-cuda)
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// BIN2: 20: assembler, {19}, object, (host-cuda)
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// BIN2: 21: linker, {20}, image, (host-cuda)
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//
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// Test two gpu architecturess up to the assemble phase.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 --cuda-gpu-arch=sm_35 %s -S 2>&1 \
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// RUN: | FileCheck -check-prefix=ASM2 %s
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// ASM2: 0: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_30)
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// ASM2: 1: preprocessor, {0}, cuda-cpp-output, (device-cuda, sm_30)
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// ASM2: 2: compiler, {1}, ir, (device-cuda, sm_30)
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// ASM2: 3: backend, {2}, assembler, (device-cuda, sm_30)
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// ASM2: 4: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {3}, assembler
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// ASM2: 5: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_35)
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// ASM2: 6: preprocessor, {5}, cuda-cpp-output, (device-cuda, sm_35)
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// ASM2: 7: compiler, {6}, ir, (device-cuda, sm_35)
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// ASM2: 8: backend, {7}, assembler, (device-cuda, sm_35)
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// ASM2: 9: offload, "device-cuda (nvptx64-nvidia-cuda:sm_35)" {8}, assembler
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// ASM2: 10: input, "{{.*}}cuda-phases.cu", cuda, (host-cuda)
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// ASM2: 11: preprocessor, {10}, cuda-cpp-output, (host-cuda)
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// ASM2: 12: compiler, {11}, ir, (host-cuda)
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// ASM2: 13: backend, {12}, assembler, (host-cuda)
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//
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// Test single gpu architecture with complete compilation in host-only
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// compilation mode.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 %s --cuda-host-only 2>&1 \
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// RUN: | FileCheck -check-prefix=HBIN %s
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// HBIN: 0: input, "{{.*}}cuda-phases.cu", cuda, (host-cuda)
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// HBIN: 1: preprocessor, {0}, cuda-cpp-output, (host-cuda)
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// HBIN: 2: compiler, {1}, ir, (host-cuda)
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// HBIN: 3: offload, "host-cuda (powerpc64le-ibm-linux-gnu)" {2}, ir
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// HBIN: 4: backend, {3}, assembler, (host-cuda)
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// HBIN: 5: assembler, {4}, object, (host-cuda)
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// HBIN: 6: linker, {5}, image, (host-cuda)
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//
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// Test single gpu architecture up to the assemble phase in host-only
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// compilation mode.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 %s --cuda-host-only -S 2>&1 \
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// RUN: | FileCheck -check-prefix=HASM %s
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// HASM: 0: input, "{{.*}}cuda-phases.cu", cuda, (host-cuda)
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// HASM: 1: preprocessor, {0}, cuda-cpp-output, (host-cuda)
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// HASM: 2: compiler, {1}, ir, (host-cuda)
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// HASM: 3: offload, "host-cuda (powerpc64le-ibm-linux-gnu)" {2}, ir
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// HASM: 4: backend, {3}, assembler, (host-cuda)
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//
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// Test two gpu architectures with complete compilation in host-only
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// compilation mode.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 --cuda-gpu-arch=sm_35 %s --cuda-host-only 2>&1 \
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// RUN: | FileCheck -check-prefix=HBIN2 %s
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// HBIN2: 0: input, "{{.*}}cuda-phases.cu", cuda, (host-cuda)
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// HBIN2: 1: preprocessor, {0}, cuda-cpp-output, (host-cuda)
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// HBIN2: 2: compiler, {1}, ir, (host-cuda)
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// HBIN2: 3: offload, "host-cuda (powerpc64le-ibm-linux-gnu)" {2}, ir
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// HBIN2: 4: backend, {3}, assembler, (host-cuda)
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// HBIN2: 5: assembler, {4}, object, (host-cuda)
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// HBIN2: 6: linker, {5}, image, (host-cuda)
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//
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// Test two gpu architectures up to the assemble phase in host-only
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// compilation mode.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 --cuda-gpu-arch=sm_35 %s --cuda-host-only -S 2>&1 \
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// RUN: | FileCheck -check-prefix=HASM2 %s
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// HASM2: 0: input, "{{.*}}cuda-phases.cu", cuda, (host-cuda)
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// HASM2: 1: preprocessor, {0}, cuda-cpp-output, (host-cuda)
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// HASM2: 2: compiler, {1}, ir, (host-cuda)
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// HASM2: 3: offload, "host-cuda (powerpc64le-ibm-linux-gnu)" {2}, ir
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// HASM2: 4: backend, {3}, assembler, (host-cuda)
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//
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// Test single gpu architecture with complete compilation in device-only
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// compilation mode.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 %s --cuda-device-only 2>&1 \
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// RUN: | FileCheck -check-prefix=DBIN %s
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// DBIN: 0: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_30)
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// DBIN: 1: preprocessor, {0}, cuda-cpp-output, (device-cuda, sm_30)
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// DBIN: 2: compiler, {1}, ir, (device-cuda, sm_30)
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// DBIN: 3: backend, {2}, assembler, (device-cuda, sm_30)
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// DBIN: 4: assembler, {3}, object, (device-cuda, sm_30)
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// DBIN: 5: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {4}, object
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//
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// Test single gpu architecture up to the assemble phase in device-only
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// compilation mode.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 %s --cuda-device-only -S 2>&1 \
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// RUN: | FileCheck -check-prefix=DASM %s
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// DASM: 0: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_30)
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// DASM: 1: preprocessor, {0}, cuda-cpp-output, (device-cuda, sm_30)
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// DASM: 2: compiler, {1}, ir, (device-cuda, sm_30)
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// DASM: 3: backend, {2}, assembler, (device-cuda, sm_30)
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// DASM: 4: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {3}, assembler
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//
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// Test two gpu architectures with complete compilation in device-only
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// compilation mode.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 --cuda-gpu-arch=sm_35 %s --cuda-device-only 2>&1 \
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// RUN: | FileCheck -check-prefix=DBIN2 %s
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// DBIN2: 0: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_30)
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// DBIN2: 1: preprocessor, {0}, cuda-cpp-output, (device-cuda, sm_30)
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// DBIN2: 2: compiler, {1}, ir, (device-cuda, sm_30)
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// DBIN2: 3: backend, {2}, assembler, (device-cuda, sm_30)
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// DBIN2: 4: assembler, {3}, object, (device-cuda, sm_30)
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// DBIN2: 5: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {4}, object
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// DBIN2: 6: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_35)
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// DBIN2: 7: preprocessor, {6}, cuda-cpp-output, (device-cuda, sm_35)
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// DBIN2: 8: compiler, {7}, ir, (device-cuda, sm_35)
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// DBIN2: 9: backend, {8}, assembler, (device-cuda, sm_35)
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// DBIN2: 10: assembler, {9}, object, (device-cuda, sm_35)
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// DBIN2: 11: offload, "device-cuda (nvptx64-nvidia-cuda:sm_35)" {10}, object
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//
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// Test two gpu architectures up to the assemble phase in device-only
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// compilation mode.
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//
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// RUN: %clang -target powerpc64le-ibm-linux-gnu -ccc-print-phases --cuda-gpu-arch=sm_30 --cuda-gpu-arch=sm_35 %s --cuda-device-only -S 2>&1 \
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// RUN: | FileCheck -check-prefix=DASM2 %s
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// DASM2: 0: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_30)
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// DASM2: 1: preprocessor, {0}, cuda-cpp-output, (device-cuda, sm_30)
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// DASM2: 2: compiler, {1}, ir, (device-cuda, sm_30)
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// DASM2: 3: backend, {2}, assembler, (device-cuda, sm_30)
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// DASM2: 4: offload, "device-cuda (nvptx64-nvidia-cuda:sm_30)" {3}, assembler
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// DASM2: 5: input, "{{.*}}cuda-phases.cu", cuda, (device-cuda, sm_35)
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// DASM2: 6: preprocessor, {5}, cuda-cpp-output, (device-cuda, sm_35)
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// DASM2: 7: compiler, {6}, ir, (device-cuda, sm_35)
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// DASM2: 8: backend, {7}, assembler, (device-cuda, sm_35)
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// DASM2: 9: offload, "device-cuda (nvptx64-nvidia-cuda:sm_35)" {8}, assembler
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