forked from OSchip/llvm-project
94c163c34e
This helps to avoid the situation where RA spots that only 3 of the v4f32 result of a load are used, and immediately reallocates the 4th register for something else, requiring a stall waiting for the load. Differential Revision: https://reviews.llvm.org/D58906 Change-Id: I947661edfd5715f62361a02b100f14aeeada29aa llvm-svn: 356768 |
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amdgcn-demanded-vector-elts.ll | ||
amdgcn-intrinsics.ll | ||
lit.local.cfg |