forked from OSchip/llvm-project
![]() - fix store to load forwarding for a certain set of cases (where forwarding shouldn't have happened); use AffineValueMap difference based MemRefAccess equality checking; utility logic is also greatly simplified - add missing equality/inequality operators for AffineExpr ==/!= ints - add == != operators on MemRefAccess Closes tensorflow/mlir#136 COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/136 from bondhugula:store-load-forwarding d79fd1add8bcfbd9fa71d841a6a9905340dcd792 PiperOrigin-RevId: 270457011 |
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mlir |