forked from OSchip/llvm-project
217 lines
8.6 KiB
C++
217 lines
8.6 KiB
C++
//===-- AArch64MCTargetDesc.cpp - AArch64 Target Descriptions ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides AArch64 specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64MCTargetDesc.h"
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#include "AArch64ELFStreamer.h"
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#include "AArch64MCAsmInfo.h"
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#include "InstPrinter/AArch64InstPrinter.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define GET_INSTRINFO_MC_DESC
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#include "AArch64GenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "AArch64GenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "AArch64GenRegisterInfo.inc"
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static MCInstrInfo *createAArch64MCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitAArch64MCInstrInfo(X);
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return X;
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}
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static MCSubtargetInfo *
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createAArch64MCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) {
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MCSubtargetInfo *X = new MCSubtargetInfo();
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if (CPU.empty())
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CPU = "generic";
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InitAArch64MCSubtargetInfo(X, TT, CPU, FS);
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return X;
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}
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static MCRegisterInfo *createAArch64MCRegisterInfo(StringRef Triple) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitAArch64MCRegisterInfo(X, AArch64::LR);
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return X;
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}
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static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI,
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StringRef TT) {
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Triple TheTriple(TT);
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MCAsmInfo *MAI;
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if (TheTriple.isOSDarwin())
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MAI = new AArch64MCAsmInfoDarwin();
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else {
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assert(TheTriple.isOSBinFormatELF() && "Only expect Darwin or ELF");
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MAI = new AArch64MCAsmInfoELF(TT);
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}
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// Initial state of the frame pointer is SP.
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unsigned Reg = MRI.getDwarfRegNum(AArch64::SP, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCCodeGenInfo *createAArch64MCCodeGenInfo(StringRef TT, Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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Triple TheTriple(TT);
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assert((TheTriple.isOSBinFormatELF() || TheTriple.isOSBinFormatMachO()) &&
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"Only expect Darwin and ELF targets");
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if (CM == CodeModel::Default)
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CM = CodeModel::Small;
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// The default MCJIT memory managers make no guarantees about where they can
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// find an executable page; JITed code needs to be able to refer to globals
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// no matter how far away they are.
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else if (CM == CodeModel::JITDefault)
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CM = CodeModel::Large;
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else if (CM != CodeModel::Small && CM != CodeModel::Large)
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report_fatal_error(
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"Only small and large code models are allowed on AArch64");
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// AArch64 Darwin is always PIC.
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if (TheTriple.isOSDarwin())
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RM = Reloc::PIC_;
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// On ELF platforms the default static relocation model has a smart enough
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// linker to cope with referencing external symbols defined in a shared
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// library. Hence DynamicNoPIC doesn't need to be promoted to PIC.
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else if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
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RM = Reloc::Static;
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MCCodeGenInfo *X = new MCCodeGenInfo();
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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static MCInstPrinter *createAArch64MCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI) {
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if (SyntaxVariant == 0)
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return new AArch64InstPrinter(MAI, MII, MRI, STI);
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if (SyntaxVariant == 1)
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return new AArch64AppleInstPrinter(MAI, MII, MRI, STI);
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return nullptr;
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}
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static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
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MCContext &Ctx, MCAsmBackend &TAB,
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raw_ostream &OS, MCCodeEmitter *Emitter,
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const MCSubtargetInfo &STI, bool RelaxAll) {
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Triple TheTriple(TT);
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if (TheTriple.isOSDarwin())
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return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
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/*LabelSections*/ true);
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return createAArch64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll);
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}
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// Force static initialization.
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extern "C" void LLVMInitializeAArch64TargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(TheAArch64leTarget, createAArch64MCAsmInfo);
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RegisterMCAsmInfoFn Y(TheAArch64beTarget, createAArch64MCAsmInfo);
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RegisterMCAsmInfoFn Z(TheARM64Target, createAArch64MCAsmInfo);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(TheAArch64leTarget,
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createAArch64MCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(TheAArch64beTarget,
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createAArch64MCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(TheARM64Target,
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createAArch64MCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(TheAArch64leTarget,
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createAArch64MCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheAArch64beTarget,
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createAArch64MCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheARM64Target,
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createAArch64MCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(TheAArch64leTarget,
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createAArch64MCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheAArch64beTarget,
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createAArch64MCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheARM64Target,
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createAArch64MCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(TheAArch64leTarget,
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createAArch64MCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheAArch64beTarget,
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createAArch64MCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheARM64Target,
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createAArch64MCSubtargetInfo);
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// Register the asm backend.
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TargetRegistry::RegisterMCAsmBackend(TheAArch64leTarget,
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createAArch64leAsmBackend);
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TargetRegistry::RegisterMCAsmBackend(TheAArch64beTarget,
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createAArch64beAsmBackend);
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TargetRegistry::RegisterMCAsmBackend(TheARM64Target,
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createAArch64leAsmBackend);
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// Register the MC Code Emitter
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TargetRegistry::RegisterMCCodeEmitter(TheAArch64leTarget,
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createAArch64MCCodeEmitter);
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TargetRegistry::RegisterMCCodeEmitter(TheAArch64beTarget,
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createAArch64MCCodeEmitter);
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TargetRegistry::RegisterMCCodeEmitter(TheARM64Target,
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createAArch64MCCodeEmitter);
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// Register the object streamer.
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TargetRegistry::RegisterMCObjectStreamer(TheAArch64leTarget,
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createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheAArch64beTarget,
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createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheARM64Target, createMCStreamer);
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// Register the asm streamer.
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TargetRegistry::RegisterAsmStreamer(TheAArch64leTarget,
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createAArch64MCAsmStreamer);
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TargetRegistry::RegisterAsmStreamer(TheAArch64beTarget,
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createAArch64MCAsmStreamer);
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TargetRegistry::RegisterAsmStreamer(TheARM64Target,
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createAArch64MCAsmStreamer);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(TheAArch64leTarget,
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createAArch64MCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(TheAArch64beTarget,
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createAArch64MCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(TheARM64Target,
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createAArch64MCInstPrinter);
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}
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