forked from OSchip/llvm-project
99 lines
2.7 KiB
LLVM
99 lines
2.7 KiB
LLVM
; RUN: opt -instcombine -S < %s | FileCheck %s
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; PR5438
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; TODO: This should also optimize down.
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;define i32 @test1(i32 %a, i32 %b) nounwind readnone {
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;entry:
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; %0 = icmp sgt i32 %a, -1 ; <i1> [#uses=1]
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; %1 = icmp slt i32 %b, 0 ; <i1> [#uses=1]
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; %2 = xor i1 %1, %0 ; <i1> [#uses=1]
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; %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
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; ret i32 %3
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;}
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; TODO: This optimizes partially but not all the way.
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;define i32 @test2(i32 %a, i32 %b) nounwind readnone {
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;entry:
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; %0 = and i32 %a, 8 ;<i32> [#uses=1]
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; %1 = and i32 %b, 8 ;<i32> [#uses=1]
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; %2 = icmp eq i32 %0, %1 ;<i1> [#uses=1]
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; %3 = zext i1 %2 to i32 ;<i32> [#uses=1]
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; ret i32 %3
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;}
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define i32 @test3(i32 %a, i32 %b) nounwind readnone {
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; CHECK-LABEL: @test3(
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entry:
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; CHECK: [[XOR1:%.*]] = xor i32 %a, %b
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; CHECK: [[SHIFT:%.*]] = lshr i32 [[XOR1]], 31
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; CHECK: [[XOR2:%.*]] = xor i32 [[SHIFT]], 1
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%0 = lshr i32 %a, 31 ; <i32> [#uses=1]
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%1 = lshr i32 %b, 31 ; <i32> [#uses=1]
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%2 = icmp eq i32 %0, %1 ; <i1> [#uses=1]
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%3 = zext i1 %2 to i32 ; <i32> [#uses=1]
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ret i32 %3
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; CHECK-NOT: icmp
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; CHECK-NOT: zext
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; CHECK: ret i32 [[XOR2]]
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}
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; Variation on @test3: checking the 2nd bit in a situation where the 5th bit
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; is one, not zero.
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define i32 @test3i(i32 %a, i32 %b) nounwind readnone {
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; CHECK-LABEL: @test3i(
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entry:
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; CHECK: xor i32 %a, %b
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; CHECK: lshr i32 %0, 31
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; CHECK: xor i32 %1, 1
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%0 = lshr i32 %a, 29 ; <i32> [#uses=1]
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%1 = lshr i32 %b, 29 ; <i32> [#uses=1]
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%2 = or i32 %0, 35
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%3 = or i32 %1, 35
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%4 = icmp eq i32 %2, %3 ; <i1> [#uses=1]
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%5 = zext i1 %4 to i32 ; <i32> [#uses=1]
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ret i32 %5
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; CHECK-NOT: icmp
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; CHECK-NOT: zext
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; CHECK: ret i32 %2
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}
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define i1 @test4a(i32 %a) {
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; CHECK-LABEL: @test4a(
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entry:
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; CHECK: %c = icmp slt i32 %a, 1
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; CHECK-NEXT: ret i1 %c
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%l = ashr i32 %a, 31
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%na = sub i32 0, %a
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%r = lshr i32 %na, 31
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%signum = or i32 %l, %r
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%c = icmp slt i32 %signum, 1
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ret i1 %c
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}
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define i1 @test4b(i64 %a) {
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; CHECK-LABEL: @test4b(
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entry:
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; CHECK: %c = icmp slt i64 %a, 1
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; CHECK-NEXT: ret i1 %c
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%l = ashr i64 %a, 63
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%na = sub i64 0, %a
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%r = lshr i64 %na, 63
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%signum = or i64 %l, %r
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%c = icmp slt i64 %signum, 1
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ret i1 %c
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}
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define i1 @test4c(i64 %a) {
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; CHECK-LABEL: @test4c(
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entry:
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; CHECK: %c = icmp slt i64 %a, 1
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; CHECK-NEXT: ret i1 %c
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%l = ashr i64 %a, 63
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%na = sub i64 0, %a
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%r = lshr i64 %na, 63
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%signum = or i64 %l, %r
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%signum.trunc = trunc i64 %signum to i32
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%c = icmp slt i32 %signum.trunc, 1
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ret i1 %c
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}
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