forked from OSchip/llvm-project
311 lines
16 KiB
LLVM
311 lines
16 KiB
LLVM
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
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;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
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;CHECK-LABEL: {{^}}sample:
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;CHECK: s_wqm
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;CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_cl:
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;CHECK: s_wqm
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;CHECK: image_sample_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.cl.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_d:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_d {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_d() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.d.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_d_cl:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_d_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_d_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.d.cl.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_l:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_l {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_l() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_b:
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;CHECK: s_wqm
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;CHECK: image_sample_b {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_b() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.b.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_b_cl:
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;CHECK: s_wqm
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;CHECK: image_sample_b_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_b_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.b.cl.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_lz:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_lz {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_lz() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.lz.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_cd:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_cd {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_cd() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.cd.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_cd_cl:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_cd_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_cd_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.cd.cl.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c:
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;CHECK: s_wqm
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;CHECK: image_sample_c {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_cl:
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;CHECK: s_wqm
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;CHECK: image_sample_c_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.cl.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_d:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_c_d {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_d() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.d.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_d_cl:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_c_d_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_d_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.d.cl.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_l:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_c_l {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_l() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.l.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_b:
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;CHECK: s_wqm
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;CHECK: image_sample_c_b {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_b() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.b.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_b_cl:
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;CHECK: s_wqm
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;CHECK: image_sample_c_b_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_b_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.b.cl.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_lz:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_c_lz {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_lz() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.lz.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_cd:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_c_cd {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_cd() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.cd.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: {{^}}sample_c_cd_cl:
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;CHECK-NOT: s_wqm
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;CHECK: image_sample_c_cd_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
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define void @sample_c_cd_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.image.sample.c.cd.cl.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.cl.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.d.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.d.cl.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.b.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.b.cl.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.lz.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.cd.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.cd.cl.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.cl.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.d.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.d.cl.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.b.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.b.cl.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.lz.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.cd.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.image.sample.c.cd.cl.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { "ShaderType"="0" }
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attributes #1 = { nounwind readnone }
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