forked from OSchip/llvm-project
122 lines
3.1 KiB
YAML
122 lines
3.1 KiB
YAML
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--"
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define void @test_scalar_add_big() {
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entry:
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ret void
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}
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define void @test_scalar_add_small() {
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entry:
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ret void
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}
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define void @test_vector_add() {
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entry:
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ret void
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}
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...
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---
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name: test_scalar_add_big
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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- { id: 7, class: _ }
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- { id: 8, class: _ }
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body: |
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bb.0.entry:
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liveins: %x0, %x1, %x2, %x3
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; CHECK-LABEL: name: test_scalar_add_big
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; CHECK-NOT: G_EXTRACT
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; CHECK-NOT: G_SEQUENCE
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; CHECK-DAG: [[CARRY0_32:%.*]](s32) = G_CONSTANT i32 0
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; CHECK-DAG: [[CARRY0:%[0-9]+]](s1) = G_TRUNC [[CARRY0_32]]
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; CHECK: [[RES_LO:%.*]](s64), [[CARRY:%.*]](s1) = G_UADDE %0, %2, [[CARRY0]]
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; CHECK: [[RES_HI:%.*]](s64), {{%.*}}(s1) = G_UADDE %1, %3, [[CARRY]]
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; CHECK-NOT: G_EXTRACT
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; CHECK-NOT: G_SEQUENCE
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; CHECK: %x0 = COPY [[RES_LO]]
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; CHECK: %x1 = COPY [[RES_HI]]
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%0(s64) = COPY %x0
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%1(s64) = COPY %x1
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%2(s64) = COPY %x2
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%3(s64) = COPY %x3
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%4(s128) = G_SEQUENCE %0, 0, %1, 64
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%5(s128) = G_SEQUENCE %2, 0, %3, 64
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%6(s128) = G_ADD %4, %5
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%7(s64), %8(s64) = G_EXTRACT %6, 0, 64
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%x0 = COPY %7
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%x1 = COPY %8
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...
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---
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name: test_scalar_add_small
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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body: |
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bb.0.entry:
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liveins: %x0, %x1, %x2, %x3
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; CHECK-LABEL: name: test_scalar_add_small
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; CHECK: [[OP0:%.*]](s32) = G_ANYEXT %2(s8)
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; CHECK: [[OP1:%.*]](s32) = G_ANYEXT %3(s8)
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; CHECK: [[RES32:%.*]](s32) = G_ADD [[OP0]], [[OP1]]
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; CHECK: [[RES:%.*]](s8) = G_TRUNC [[RES32]](s32)
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%0(s64) = COPY %x0
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%1(s64) = COPY %x1
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%2(s8) = G_TRUNC %0
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%3(s8) = G_TRUNC %1
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%4(s8) = G_ADD %2, %3
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%5(s64) = G_ANYEXT %4
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%x0 = COPY %5
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...
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---
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name: test_vector_add
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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- { id: 7, class: _ }
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- { id: 8, class: _ }
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body: |
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bb.0.entry:
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liveins: %q0, %q1, %q2, %q3
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; CHECK-LABEL: name: test_vector_add
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; CHECK-NOT: G_EXTRACT
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; CHECK-NOT: G_SEQUENCE
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; CHECK: [[RES_LO:%.*]](<2 x s64>) = G_ADD %0, %2
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; CHECK: [[RES_HI:%.*]](<2 x s64>) = G_ADD %1, %3
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; CHECK-NOT: G_EXTRACT
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; CHECK-NOT: G_SEQUENCE
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; CHECK: %q0 = COPY [[RES_LO]]
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; CHECK: %q1 = COPY [[RES_HI]]
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%0(<2 x s64>) = COPY %q0
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%1(<2 x s64>) = COPY %q1
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%2(<2 x s64>) = COPY %q2
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%3(<2 x s64>) = COPY %q3
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%4(<4 x s64>) = G_SEQUENCE %0, 0, %1, 128
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%5(<4 x s64>) = G_SEQUENCE %2, 0, %3, 128
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%6(<4 x s64>) = G_ADD %4, %5
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%7(<2 x s64>), %8(<2 x s64>) = G_EXTRACT %6, 0, 128
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%q0 = COPY %7
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%q1 = COPY %8
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...
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