forked from OSchip/llvm-project
594 lines
27 KiB
TableGen
594 lines
27 KiB
TableGen
//===-- X86Schedule.td - X86 Scheduling Definitions --------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// InstrSchedModel annotations for out-of-order CPUs.
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// Instructions with folded loads need to read the memory operand immediately,
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// but other register operands don't have to be read until the load is ready.
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// These operands are marked with ReadAfterLd.
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def ReadAfterLd : SchedRead;
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// Instructions with both a load and a store folded are modeled as a folded
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// load + WriteRMW.
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def WriteRMW : SchedWrite;
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// Helper to set SchedWrite ExePorts/Latency/ResourceCycles/NumMicroOps.
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multiclass X86WriteRes<SchedWrite SchedRW,
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list<ProcResourceKind> ExePorts,
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int Lat, list<int> Res, int UOps> {
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def : WriteRes<SchedRW, ExePorts> {
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let Latency = Lat;
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let ResourceCycles = Res;
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let NumMicroOps = UOps;
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}
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}
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// Most instructions can fold loads, so almost every SchedWrite comes in two
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// variants: With and without a folded load.
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// An X86FoldableSchedWrite holds a reference to the corresponding SchedWrite
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// with a folded load.
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class X86FoldableSchedWrite : SchedWrite {
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// The SchedWrite to use when a load is folded into the instruction.
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SchedWrite Folded;
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}
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// Multiclass that produces a linked pair of SchedWrites.
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multiclass X86SchedWritePair {
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// Register-Memory operation.
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def Ld : SchedWrite;
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// Register-Register operation.
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def NAME : X86FoldableSchedWrite {
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let Folded = !cast<SchedWrite>(NAME#"Ld");
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}
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}
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// Multiclass that wraps X86FoldableSchedWrite for each vector width.
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class X86SchedWriteWidths<X86FoldableSchedWrite sScl,
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X86FoldableSchedWrite s128,
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X86FoldableSchedWrite s256,
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X86FoldableSchedWrite s512> {
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X86FoldableSchedWrite Scl = sScl; // Scalar float/double operations.
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X86FoldableSchedWrite MMX = sScl; // MMX operations.
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X86FoldableSchedWrite XMM = s128; // XMM operations.
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X86FoldableSchedWrite YMM = s256; // YMM operations.
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X86FoldableSchedWrite ZMM = s512; // ZMM operations.
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}
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// Multiclass that wraps X86SchedWriteWidths for each fp vector type.
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class X86SchedWriteSizes<X86SchedWriteWidths sPS,
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X86SchedWriteWidths sPD> {
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X86SchedWriteWidths PS = sPS;
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X86SchedWriteWidths PD = sPD;
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}
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// Multiclass that wraps move/load/store triple for a vector width.
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class X86SchedWriteMoveLS<SchedWrite MoveRR,
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SchedWrite LoadRM,
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SchedWrite StoreMR> {
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SchedWrite RR = MoveRR;
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SchedWrite RM = LoadRM;
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SchedWrite MR = StoreMR;
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}
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// Multiclass that wraps X86SchedWriteMoveLS for each vector width.
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class X86SchedWriteMoveLSWidths<X86SchedWriteMoveLS sScl,
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X86SchedWriteMoveLS s128,
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X86SchedWriteMoveLS s256,
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X86SchedWriteMoveLS s512> {
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X86SchedWriteMoveLS Scl = sScl; // Scalar float/double operations.
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X86SchedWriteMoveLS MMX = sScl; // MMX operations.
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X86SchedWriteMoveLS XMM = s128; // XMM operations.
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X86SchedWriteMoveLS YMM = s256; // YMM operations.
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X86SchedWriteMoveLS ZMM = s512; // ZMM operations.
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}
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// Loads, stores, and moves, not folded with other operations.
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def WriteLoad : SchedWrite;
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def WriteStore : SchedWrite;
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def WriteStoreNT : SchedWrite;
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def WriteMove : SchedWrite;
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// Arithmetic.
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defm WriteALU : X86SchedWritePair; // Simple integer ALU op.
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defm WriteADC : X86SchedWritePair; // Integer ALU + flags op.
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def WriteALURMW : WriteSequence<[WriteALULd, WriteStore]>;
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def WriteADCRMW : WriteSequence<[WriteADCLd, WriteStore]>;
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defm WriteIMul : X86SchedWritePair; // Integer multiplication.
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defm WriteIMul64 : X86SchedWritePair; // Integer 64-bit multiplication.
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def WriteIMulH : SchedWrite; // Integer multiplication, high part.
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def WriteLEA : SchedWrite; // LEA instructions can't fold loads.
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// Integer division.
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defm WriteDiv8 : X86SchedWritePair;
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defm WriteDiv16 : X86SchedWritePair;
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defm WriteDiv32 : X86SchedWritePair;
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defm WriteDiv64 : X86SchedWritePair;
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defm WriteIDiv8 : X86SchedWritePair;
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defm WriteIDiv16 : X86SchedWritePair;
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defm WriteIDiv32 : X86SchedWritePair;
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defm WriteIDiv64 : X86SchedWritePair;
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defm WriteBitScan : X86SchedWritePair; // Bit scan forward/reverse.
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defm WritePOPCNT : X86SchedWritePair; // Bit population count.
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defm WriteLZCNT : X86SchedWritePair; // Leading zero count.
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defm WriteTZCNT : X86SchedWritePair; // Trailing zero count.
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defm WriteCMOV : X86SchedWritePair; // Conditional move.
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defm WriteCMOV2 : X86SchedWritePair; // Conditional (CF + ZF flag) move.
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def WriteFCMOV : SchedWrite; // X87 conditional move.
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def WriteSETCC : SchedWrite; // Set register based on condition code.
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def WriteSETCCStore : SchedWrite;
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// Integer shifts and rotates.
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defm WriteShift : X86SchedWritePair;
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// BMI1 BEXTR, BMI2 BZHI
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defm WriteBEXTR : X86SchedWritePair;
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defm WriteBZHI : X86SchedWritePair;
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// Idioms that clear a register, like xorps %xmm0, %xmm0.
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// These can often bypass execution ports completely.
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def WriteZero : SchedWrite;
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// Branches don't produce values, so they have no latency, but they still
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// consume resources. Indirect branches can fold loads.
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defm WriteJump : X86SchedWritePair;
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// Floating point. This covers both scalar and vector operations.
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def WriteFLoad : SchedWrite;
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def WriteFLoadX : SchedWrite;
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def WriteFLoadY : SchedWrite;
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def WriteFMaskedLoad : SchedWrite;
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def WriteFMaskedLoadY : SchedWrite;
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def WriteFStore : SchedWrite;
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def WriteFStoreX : SchedWrite;
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def WriteFStoreY : SchedWrite;
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def WriteFStoreNT : SchedWrite;
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def WriteFStoreNTX : SchedWrite;
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def WriteFStoreNTY : SchedWrite;
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def WriteFMaskedStore : SchedWrite;
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def WriteFMaskedStoreY : SchedWrite;
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def WriteFMove : SchedWrite;
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def WriteFMoveX : SchedWrite;
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def WriteFMoveY : SchedWrite;
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defm WriteFAdd : X86SchedWritePair; // Floating point add/sub.
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defm WriteFAddX : X86SchedWritePair; // Floating point add/sub (XMM).
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defm WriteFAddY : X86SchedWritePair; // Floating point add/sub (YMM/ZMM).
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defm WriteFAdd64 : X86SchedWritePair; // Floating point double add/sub.
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defm WriteFAdd64X : X86SchedWritePair; // Floating point double add/sub (XMM).
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defm WriteFAdd64Y : X86SchedWritePair; // Floating point double add/sub (YMM/ZMM).
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defm WriteFCmp : X86SchedWritePair; // Floating point compare.
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defm WriteFCmpX : X86SchedWritePair; // Floating point compare (XMM).
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defm WriteFCmpY : X86SchedWritePair; // Floating point compare (YMM/ZMM).
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defm WriteFCmp64 : X86SchedWritePair; // Floating point double compare.
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defm WriteFCmp64X : X86SchedWritePair; // Floating point double compare (XMM).
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defm WriteFCmp64Y : X86SchedWritePair; // Floating point double compare (YMM/ZMM).
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defm WriteFCom : X86SchedWritePair; // Floating point compare to flags.
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defm WriteFMul : X86SchedWritePair; // Floating point multiplication.
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defm WriteFMulX : X86SchedWritePair; // Floating point multiplication (XMM).
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defm WriteFMulY : X86SchedWritePair; // Floating point multiplication (YMM/ZMM).
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defm WriteFMul64 : X86SchedWritePair; // Floating point double multiplication.
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defm WriteFMul64X : X86SchedWritePair; // Floating point double multiplication (XMM).
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defm WriteFMul64Y : X86SchedWritePair; // Floating point double multiplication (YMM/ZMM).
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defm WriteFDiv : X86SchedWritePair; // Floating point division.
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defm WriteFDivX : X86SchedWritePair; // Floating point division (XMM).
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defm WriteFDivY : X86SchedWritePair; // Floating point division (YMM).
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defm WriteFDivZ : X86SchedWritePair; // Floating point division (ZMM).
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defm WriteFDiv64 : X86SchedWritePair; // Floating point double division.
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defm WriteFDiv64X : X86SchedWritePair; // Floating point double division (XMM).
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defm WriteFDiv64Y : X86SchedWritePair; // Floating point double division (YMM).
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defm WriteFDiv64Z : X86SchedWritePair; // Floating point double division (ZMM).
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defm WriteFSqrt : X86SchedWritePair; // Floating point square root.
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defm WriteFSqrtX : X86SchedWritePair; // Floating point square root (XMM).
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defm WriteFSqrtY : X86SchedWritePair; // Floating point square root (YMM).
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defm WriteFSqrtZ : X86SchedWritePair; // Floating point square root (ZMM).
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defm WriteFSqrt64 : X86SchedWritePair; // Floating point double square root.
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defm WriteFSqrt64X : X86SchedWritePair; // Floating point double square root (XMM).
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defm WriteFSqrt64Y : X86SchedWritePair; // Floating point double square root (YMM).
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defm WriteFSqrt64Z : X86SchedWritePair; // Floating point double square root (ZMM).
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defm WriteFSqrt80 : X86SchedWritePair; // Floating point long double square root.
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defm WriteFRcp : X86SchedWritePair; // Floating point reciprocal estimate.
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defm WriteFRcpX : X86SchedWritePair; // Floating point reciprocal estimate (XMM).
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defm WriteFRcpY : X86SchedWritePair; // Floating point reciprocal estimate (YMM/ZMM).
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defm WriteFRsqrt : X86SchedWritePair; // Floating point reciprocal square root estimate.
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defm WriteFRsqrtX: X86SchedWritePair; // Floating point reciprocal square root estimate (XMM).
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defm WriteFRsqrtY: X86SchedWritePair; // Floating point reciprocal square root estimate (YMM/ZMM).
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defm WriteFMA : X86SchedWritePair; // Fused Multiply Add.
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defm WriteFMAX : X86SchedWritePair; // Fused Multiply Add (XMM).
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defm WriteFMAY : X86SchedWritePair; // Fused Multiply Add (YMM/ZMM).
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defm WriteDPPD : X86SchedWritePair; // Floating point double dot product.
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defm WriteDPPS : X86SchedWritePair; // Floating point single dot product.
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defm WriteDPPSY : X86SchedWritePair; // Floating point single dot product (YMM).
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defm WriteFSign : X86SchedWritePair; // Floating point fabs/fchs.
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defm WriteFRnd : X86SchedWritePair; // Floating point rounding.
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defm WriteFRndY : X86SchedWritePair; // Floating point rounding (YMM/ZMM).
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defm WriteFLogic : X86SchedWritePair; // Floating point and/or/xor logicals.
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defm WriteFLogicY : X86SchedWritePair; // Floating point and/or/xor logicals (YMM/ZMM).
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defm WriteFTest : X86SchedWritePair; // Floating point TEST instructions.
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defm WriteFTestY : X86SchedWritePair; // Floating point TEST instructions (YMM/ZMM).
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defm WriteFShuffle : X86SchedWritePair; // Floating point vector shuffles.
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defm WriteFShuffleY : X86SchedWritePair; // Floating point vector shuffles (YMM/ZMM).
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defm WriteFVarShuffle : X86SchedWritePair; // Floating point vector variable shuffles.
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defm WriteFVarShuffleY : X86SchedWritePair; // Floating point vector variable shuffles (YMM/ZMM).
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defm WriteFBlend : X86SchedWritePair; // Floating point vector blends.
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defm WriteFBlendY : X86SchedWritePair; // Floating point vector blends (YMM/ZMM).
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defm WriteFVarBlend : X86SchedWritePair; // Fp vector variable blends.
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defm WriteFVarBlendY : X86SchedWritePair; // Fp vector variable blends (YMM/ZMM).
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// FMA Scheduling helper class.
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class FMASC { X86FoldableSchedWrite Sched = WriteFAdd; }
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// Horizontal Add/Sub (float and integer)
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defm WriteFHAdd : X86SchedWritePair;
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defm WriteFHAddY : X86SchedWritePair; // YMM/ZMM.
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defm WritePHAdd : X86SchedWritePair;
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defm WritePHAddX : X86SchedWritePair; // XMM.
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defm WritePHAddY : X86SchedWritePair; // YMM/ZMM.
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// Vector integer operations.
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def WriteVecLoad : SchedWrite;
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def WriteVecLoadX : SchedWrite;
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def WriteVecLoadY : SchedWrite;
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def WriteVecLoadNT : SchedWrite;
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def WriteVecLoadNTY : SchedWrite;
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def WriteVecMaskedLoad : SchedWrite;
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def WriteVecMaskedLoadY : SchedWrite;
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def WriteVecStore : SchedWrite;
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def WriteVecStoreX : SchedWrite;
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def WriteVecStoreY : SchedWrite;
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def WriteVecStoreNT : SchedWrite;
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def WriteVecStoreNTY : SchedWrite;
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def WriteVecMaskedStore : SchedWrite;
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def WriteVecMaskedStoreY : SchedWrite;
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def WriteVecMove : SchedWrite;
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def WriteVecMoveX : SchedWrite;
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def WriteVecMoveY : SchedWrite;
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def WriteVecMoveToGpr : SchedWrite;
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def WriteVecMoveFromGpr : SchedWrite;
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defm WriteVecALU : X86SchedWritePair; // Vector integer ALU op, no logicals.
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defm WriteVecALUX : X86SchedWritePair; // Vector integer ALU op, no logicals (XMM).
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defm WriteVecALUY : X86SchedWritePair; // Vector integer ALU op, no logicals (YMM/ZMM).
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defm WriteVecLogic : X86SchedWritePair; // Vector integer and/or/xor logicals.
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defm WriteVecLogicX : X86SchedWritePair; // Vector integer and/or/xor logicals (XMM).
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defm WriteVecLogicY : X86SchedWritePair; // Vector integer and/or/xor logicals (YMM/ZMM).
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defm WriteVecTest : X86SchedWritePair; // Vector integer TEST instructions.
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defm WriteVecTestY : X86SchedWritePair; // Vector integer TEST instructions (YMM/ZMM).
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defm WriteVecShift : X86SchedWritePair; // Vector integer shifts (default).
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defm WriteVecShiftX : X86SchedWritePair; // Vector integer shifts (XMM).
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defm WriteVecShiftY : X86SchedWritePair; // Vector integer shifts (YMM/ZMM).
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defm WriteVecShiftImm : X86SchedWritePair; // Vector integer immediate shifts (default).
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defm WriteVecShiftImmX: X86SchedWritePair; // Vector integer immediate shifts (XMM).
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defm WriteVecShiftImmY: X86SchedWritePair; // Vector integer immediate shifts (YMM/ZMM).
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defm WriteVecIMul : X86SchedWritePair; // Vector integer multiply (default).
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defm WriteVecIMulX : X86SchedWritePair; // Vector integer multiply (XMM).
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defm WriteVecIMulY : X86SchedWritePair; // Vector integer multiply (YMM/ZMM).
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defm WritePMULLD : X86SchedWritePair; // Vector PMULLD.
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defm WritePMULLDY : X86SchedWritePair; // Vector PMULLD (YMM/ZMM).
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defm WriteShuffle : X86SchedWritePair; // Vector shuffles.
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defm WriteShuffleX : X86SchedWritePair; // Vector shuffles (XMM).
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defm WriteShuffleY : X86SchedWritePair; // Vector shuffles (YMM/ZMM).
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defm WriteVarShuffle : X86SchedWritePair; // Vector variable shuffles.
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defm WriteVarShuffleX : X86SchedWritePair; // Vector variable shuffles (XMM).
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defm WriteVarShuffleY : X86SchedWritePair; // Vector variable shuffles (YMM/ZMM).
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defm WriteBlend : X86SchedWritePair; // Vector blends.
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defm WriteBlendY : X86SchedWritePair; // Vector blends (YMM/ZMM).
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defm WriteVarBlend : X86SchedWritePair; // Vector variable blends.
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defm WriteVarBlendY : X86SchedWritePair; // Vector variable blends (YMM/ZMM).
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defm WritePSADBW : X86SchedWritePair; // Vector PSADBW.
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defm WritePSADBWX : X86SchedWritePair; // Vector PSADBW (XMM).
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defm WritePSADBWY : X86SchedWritePair; // Vector PSADBW (YMM/ZMM).
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defm WriteMPSAD : X86SchedWritePair; // Vector MPSAD.
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defm WriteMPSADY : X86SchedWritePair; // Vector MPSAD (YMM/ZMM).
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defm WritePHMINPOS : X86SchedWritePair; // Vector PHMINPOS.
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// Vector insert/extract operations.
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defm WriteVecInsert : X86SchedWritePair; // Insert gpr to vector element.
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def WriteVecExtract : SchedWrite; // Extract vector element to gpr.
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def WriteVecExtractSt : SchedWrite; // Extract vector element and store.
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// MOVMSK operations.
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def WriteFMOVMSK : SchedWrite;
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def WriteVecMOVMSK : SchedWrite;
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def WriteVecMOVMSKY : SchedWrite;
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def WriteMMXMOVMSK : SchedWrite;
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// Conversion between integer and float.
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defm WriteCvtSD2I : X86SchedWritePair; // Double -> Integer.
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defm WriteCvtPD2I : X86SchedWritePair; // Double -> Integer (XMM).
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defm WriteCvtPD2IY : X86SchedWritePair; // Double -> Integer (YMM/ZMM).
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defm WriteCvtSS2I : X86SchedWritePair; // Float -> Integer.
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defm WriteCvtPS2I : X86SchedWritePair; // Float -> Integer (XMM).
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defm WriteCvtPS2IY : X86SchedWritePair; // Float -> Integer (YMM/ZMM).
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defm WriteCvtI2SD : X86SchedWritePair; // Integer -> Double.
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defm WriteCvtI2PD : X86SchedWritePair; // Integer -> Double (XMM).
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defm WriteCvtI2PDY : X86SchedWritePair; // Integer -> Double (YMM/ZMM).
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defm WriteCvtI2SS : X86SchedWritePair; // Integer -> Float.
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defm WriteCvtI2PS : X86SchedWritePair; // Integer -> Float (XMM).
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defm WriteCvtI2PSY : X86SchedWritePair; // Integer -> Float (YMM/ZMM).
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defm WriteCvtSS2SD : X86SchedWritePair; // Float -> Double size conversion.
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defm WriteCvtPS2PD : X86SchedWritePair; // Float -> Double size conversion (XMM).
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defm WriteCvtPS2PDY : X86SchedWritePair; // Float -> Double size conversion (YMM/ZMM).
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defm WriteCvtSD2SS : X86SchedWritePair; // Double -> Float size conversion.
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defm WriteCvtPD2PS : X86SchedWritePair; // Double -> Float size conversion (XMM).
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defm WriteCvtPD2PSY : X86SchedWritePair; // Double -> Float size conversion (YMM/ZMM).
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defm WriteCvtPH2PS : X86SchedWritePair; // Half -> Float size conversion.
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defm WriteCvtPH2PSY : X86SchedWritePair; // Half -> Float size conversion (YMM/ZMM).
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def WriteCvtPS2PH : SchedWrite; // // Float -> Half size conversion.
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def WriteCvtPS2PHY : SchedWrite; // // Float -> Half size conversion (YMM/ZMM).
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def WriteCvtPS2PHSt : SchedWrite; // // Float -> Half + store size conversion.
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def WriteCvtPS2PHYSt : SchedWrite; // // Float -> Half + store size conversion (YMM/ZMM).
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// CRC32 instruction.
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defm WriteCRC32 : X86SchedWritePair;
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// Strings instructions.
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// Packed Compare Implicit Length Strings, Return Mask
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defm WritePCmpIStrM : X86SchedWritePair;
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// Packed Compare Explicit Length Strings, Return Mask
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defm WritePCmpEStrM : X86SchedWritePair;
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// Packed Compare Implicit Length Strings, Return Index
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defm WritePCmpIStrI : X86SchedWritePair;
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// Packed Compare Explicit Length Strings, Return Index
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defm WritePCmpEStrI : X86SchedWritePair;
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// AES instructions.
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defm WriteAESDecEnc : X86SchedWritePair; // Decryption, encryption.
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defm WriteAESIMC : X86SchedWritePair; // InvMixColumn.
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defm WriteAESKeyGen : X86SchedWritePair; // Key Generation.
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// Carry-less multiplication instructions.
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defm WriteCLMul : X86SchedWritePair;
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// EMMS/FEMMS
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def WriteEMMS : SchedWrite;
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// Load/store MXCSR
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def WriteLDMXCSR : SchedWrite;
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def WriteSTMXCSR : SchedWrite;
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// Catch-all for expensive system instructions.
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def WriteSystem : SchedWrite;
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// AVX2.
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defm WriteFShuffle256 : X86SchedWritePair; // Fp 256-bit width vector shuffles.
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defm WriteFVarShuffle256 : X86SchedWritePair; // Fp 256-bit width variable shuffles.
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defm WriteShuffle256 : X86SchedWritePair; // 256-bit width vector shuffles.
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defm WriteVarShuffle256 : X86SchedWritePair; // 256-bit width vector variable shuffles.
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defm WriteVarVecShift : X86SchedWritePair; // Variable vector shifts.
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defm WriteVarVecShiftY : X86SchedWritePair; // Variable vector shifts (YMM/ZMM).
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// Old microcoded instructions that nobody use.
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def WriteMicrocoded : SchedWrite;
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// Fence instructions.
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def WriteFence : SchedWrite;
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// Nop, not very useful expect it provides a model for nops!
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def WriteNop : SchedWrite;
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// Move/Load/Store wrappers.
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def WriteFMoveLS
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: X86SchedWriteMoveLS<WriteFMove, WriteFLoad, WriteFStore>;
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def WriteFMoveLSX
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: X86SchedWriteMoveLS<WriteFMoveX, WriteFLoadX, WriteFStoreX>;
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def WriteFMoveLSY
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: X86SchedWriteMoveLS<WriteFMoveY, WriteFLoadY, WriteFStoreY>;
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def SchedWriteFMoveLS
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: X86SchedWriteMoveLSWidths<WriteFMoveLS, WriteFMoveLSX,
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WriteFMoveLSY, WriteFMoveLSY>;
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def WriteFMoveLSNT
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: X86SchedWriteMoveLS<WriteFMove, WriteFLoad, WriteFStoreNT>;
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def WriteFMoveLSNTX
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: X86SchedWriteMoveLS<WriteFMove, WriteFLoad, WriteFStoreNTX>;
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def WriteFMoveLSNTY
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: X86SchedWriteMoveLS<WriteFMoveY, WriteFLoadY, WriteFStoreNTY>;
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def SchedWriteFMoveLSNT
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: X86SchedWriteMoveLSWidths<WriteFMoveLSNT, WriteFMoveLSNTX,
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WriteFMoveLSNTY, WriteFMoveLSNTY>;
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def WriteVecMoveLS
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: X86SchedWriteMoveLS<WriteVecMove, WriteVecLoad, WriteVecStore>;
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def WriteVecMoveLSX
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: X86SchedWriteMoveLS<WriteVecMoveX, WriteVecLoadX, WriteVecStoreX>;
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def WriteVecMoveLSY
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: X86SchedWriteMoveLS<WriteVecMoveY, WriteVecLoadY, WriteVecStoreY>;
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def SchedWriteVecMoveLS
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: X86SchedWriteMoveLSWidths<WriteVecMoveLS, WriteVecMoveLSX,
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WriteVecMoveLSY, WriteVecMoveLSY>;
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def WriteVecMoveLSNT
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: X86SchedWriteMoveLS<WriteVecMove, WriteVecLoadNT, WriteVecStoreNT>;
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def WriteVecMoveLSNTX
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: X86SchedWriteMoveLS<WriteVecMoveX, WriteVecLoadNT, WriteVecStoreNT>;
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def WriteVecMoveLSNTY
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: X86SchedWriteMoveLS<WriteVecMoveY, WriteVecLoadNTY, WriteVecStoreNTY>;
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def SchedWriteVecMoveLSNT
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: X86SchedWriteMoveLSWidths<WriteVecMoveLSNT, WriteVecMoveLSNTX,
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WriteVecMoveLSNTY, WriteVecMoveLSNTY>;
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// Vector width wrappers.
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def SchedWriteFAdd
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: X86SchedWriteWidths<WriteFAdd, WriteFAddX, WriteFAddY, WriteFAddY>;
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def SchedWriteFAdd64
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: X86SchedWriteWidths<WriteFAdd64, WriteFAdd64X, WriteFAdd64Y, WriteFAdd64Y>;
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def SchedWriteFHAdd
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: X86SchedWriteWidths<WriteFHAdd, WriteFHAdd, WriteFHAddY, WriteFHAddY>;
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def SchedWriteFCmp
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: X86SchedWriteWidths<WriteFCmp, WriteFCmpX, WriteFCmpY, WriteFCmpY>;
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def SchedWriteFCmp64
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: X86SchedWriteWidths<WriteFCmp64, WriteFCmp64X, WriteFCmp64Y, WriteFCmp64Y>;
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def SchedWriteFMul
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: X86SchedWriteWidths<WriteFMul, WriteFMulX, WriteFMulY, WriteFMulY>;
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def SchedWriteFMul64
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: X86SchedWriteWidths<WriteFMul64, WriteFMul64X, WriteFMul64Y, WriteFMul64Y>;
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def SchedWriteFMA
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: X86SchedWriteWidths<WriteFMA, WriteFMAX, WriteFMAY, WriteFMAY>;
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def SchedWriteDPPD
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: X86SchedWriteWidths<WriteDPPD, WriteDPPD, WriteDPPD, WriteDPPD>;
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def SchedWriteDPPS
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: X86SchedWriteWidths<WriteDPPS, WriteDPPS, WriteDPPSY, WriteDPPSY>;
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def SchedWriteFDiv
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: X86SchedWriteWidths<WriteFDiv, WriteFDivX, WriteFDivY, WriteFDivZ>;
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def SchedWriteFDiv64
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: X86SchedWriteWidths<WriteFDiv64, WriteFDiv64X, WriteFDiv64Y, WriteFDiv64Z>;
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def SchedWriteFSqrt
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: X86SchedWriteWidths<WriteFSqrt, WriteFSqrtX,
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WriteFSqrtY, WriteFSqrtZ>;
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def SchedWriteFSqrt64
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: X86SchedWriteWidths<WriteFSqrt64, WriteFSqrt64X,
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WriteFSqrt64Y, WriteFSqrt64Z>;
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def SchedWriteFRcp
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: X86SchedWriteWidths<WriteFRcp, WriteFRcpX, WriteFRcpY, WriteFRcpY>;
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def SchedWriteFRsqrt
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: X86SchedWriteWidths<WriteFRsqrt, WriteFRsqrtX, WriteFRsqrtY, WriteFRsqrtY>;
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def SchedWriteFRnd
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: X86SchedWriteWidths<WriteFRnd, WriteFRnd, WriteFRndY, WriteFRndY>;
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def SchedWriteFLogic
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: X86SchedWriteWidths<WriteFLogic, WriteFLogic, WriteFLogicY, WriteFLogicY>;
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def SchedWriteFTest
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: X86SchedWriteWidths<WriteFTest, WriteFTest, WriteFTestY, WriteFTestY>;
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def SchedWriteFShuffle
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: X86SchedWriteWidths<WriteFShuffle, WriteFShuffle,
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WriteFShuffleY, WriteFShuffleY>;
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def SchedWriteFVarShuffle
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: X86SchedWriteWidths<WriteFVarShuffle, WriteFVarShuffle,
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WriteFVarShuffleY, WriteFVarShuffleY>;
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def SchedWriteFBlend
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: X86SchedWriteWidths<WriteFBlend, WriteFBlend, WriteFBlendY, WriteFBlendY>;
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def SchedWriteFVarBlend
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: X86SchedWriteWidths<WriteFVarBlend, WriteFVarBlend,
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WriteFVarBlendY, WriteFVarBlendY>;
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def SchedWriteCvtDQ2PD
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: X86SchedWriteWidths<WriteCvtI2SD, WriteCvtI2PD,
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WriteCvtI2PDY, WriteCvtI2PDY>;
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def SchedWriteCvtDQ2PS
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: X86SchedWriteWidths<WriteCvtI2SS, WriteCvtI2PS,
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WriteCvtI2PSY, WriteCvtI2PSY>;
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def SchedWriteCvtPD2DQ
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: X86SchedWriteWidths<WriteCvtSD2I, WriteCvtPD2I,
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WriteCvtPD2IY, WriteCvtPD2IY>;
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def SchedWriteCvtPS2DQ
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: X86SchedWriteWidths<WriteCvtSS2I, WriteCvtPS2I,
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WriteCvtPS2IY, WriteCvtPS2IY>;
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def SchedWriteCvtPS2PD
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: X86SchedWriteWidths<WriteCvtSS2SD, WriteCvtPS2PD,
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WriteCvtPS2PDY, WriteCvtPS2PDY>;
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def SchedWriteCvtPD2PS
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: X86SchedWriteWidths<WriteCvtSD2SS, WriteCvtPD2PS,
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WriteCvtPD2PSY, WriteCvtPD2PSY>;
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def SchedWriteVecALU
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: X86SchedWriteWidths<WriteVecALU, WriteVecALUX, WriteVecALUY, WriteVecALUY>;
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def SchedWritePHAdd
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: X86SchedWriteWidths<WritePHAdd, WritePHAddX, WritePHAddY, WritePHAddY>;
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def SchedWriteVecLogic
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: X86SchedWriteWidths<WriteVecLogic, WriteVecLogicX,
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WriteVecLogicY, WriteVecLogicY>;
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def SchedWriteVecTest
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: X86SchedWriteWidths<WriteVecTest, WriteVecTest,
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WriteVecTestY, WriteVecTestY>;
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def SchedWriteVecShift
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: X86SchedWriteWidths<WriteVecShift, WriteVecShiftX,
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WriteVecShiftY, WriteVecShiftY>;
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def SchedWriteVecShiftImm
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: X86SchedWriteWidths<WriteVecShiftImm, WriteVecShiftImmX,
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WriteVecShiftImmY, WriteVecShiftImmY>;
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def SchedWriteVarVecShift
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: X86SchedWriteWidths<WriteVarVecShift, WriteVarVecShift,
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WriteVarVecShiftY, WriteVarVecShiftY>;
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def SchedWriteVecIMul
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: X86SchedWriteWidths<WriteVecIMul, WriteVecIMulX,
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WriteVecIMulY, WriteVecIMulY>;
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def SchedWritePMULLD
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: X86SchedWriteWidths<WritePMULLD, WritePMULLD,
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WritePMULLDY, WritePMULLDY>;
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def SchedWriteMPSAD
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: X86SchedWriteWidths<WriteMPSAD, WriteMPSAD,
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WriteMPSADY, WriteMPSADY>;
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def SchedWritePSADBW
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: X86SchedWriteWidths<WritePSADBW, WritePSADBWX,
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WritePSADBWY, WritePSADBWY>;
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def SchedWriteShuffle
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: X86SchedWriteWidths<WriteShuffle, WriteShuffleX,
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WriteShuffleY, WriteShuffleY>;
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def SchedWriteVarShuffle
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: X86SchedWriteWidths<WriteVarShuffle, WriteVarShuffleX,
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WriteVarShuffleY, WriteVarShuffleY>;
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def SchedWriteBlend
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: X86SchedWriteWidths<WriteBlend, WriteBlend, WriteBlendY, WriteBlendY>;
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def SchedWriteVarBlend
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: X86SchedWriteWidths<WriteVarBlend, WriteVarBlend,
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WriteVarBlendY, WriteVarBlendY>;
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// Vector size wrappers.
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def SchedWriteFAddSizes
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: X86SchedWriteSizes<SchedWriteFAdd, SchedWriteFAdd64>;
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def SchedWriteFCmpSizes
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: X86SchedWriteSizes<SchedWriteFCmp, SchedWriteFCmp64>;
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def SchedWriteFMulSizes
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: X86SchedWriteSizes<SchedWriteFMul, SchedWriteFMul64>;
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def SchedWriteFDivSizes
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: X86SchedWriteSizes<SchedWriteFDiv, SchedWriteFDiv64>;
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def SchedWriteFSqrtSizes
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: X86SchedWriteSizes<SchedWriteFSqrt, SchedWriteFSqrt64>;
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def SchedWriteFLogicSizes
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: X86SchedWriteSizes<SchedWriteFLogic, SchedWriteFLogic>;
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def SchedWriteFShuffleSizes
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: X86SchedWriteSizes<SchedWriteFShuffle, SchedWriteFShuffle>;
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//===----------------------------------------------------------------------===//
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// Generic Processor Scheduler Models.
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// IssueWidth is analogous to the number of decode units. Core and its
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// descendents, including Nehalem and SandyBridge have 4 decoders.
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// Resources beyond the decoder operate on micro-ops and are bufferred
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// so adjacent micro-ops don't directly compete.
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//
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// MicroOpBufferSize > 1 indicates that RAW dependencies can be
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// decoded in the same cycle. The value 32 is a reasonably arbitrary
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// number of in-flight instructions.
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//
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// HighLatency=10 is optimistic. X86InstrInfo::isHighLatencyDef
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// indicates high latency opcodes. Alternatively, InstrItinData
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// entries may be included here to define specific operand
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// latencies. Since these latencies are not used for pipeline hazards,
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// they do not need to be exact.
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//
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// The GenericX86Model contains no instruction schedules
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// and disables PostRAScheduler.
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class GenericX86Model : SchedMachineModel {
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let IssueWidth = 4;
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let MicroOpBufferSize = 32;
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let LoadLatency = 4;
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let HighLatency = 10;
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let PostRAScheduler = 0;
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let CompleteModel = 0;
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}
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def GenericModel : GenericX86Model;
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// Define a model with the PostRAScheduler enabled.
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def GenericPostRAModel : GenericX86Model {
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let PostRAScheduler = 1;
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}
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