llvm-project/llvm/test/CodeGen
Jessica Paquette 8a4d9f04b5 [AArch64][GlobalISel] Support -tailcallopt
This adds support for `-tailcallopt` tail calls to CallLowering. This
piggy-backs off the changes from D67577, since doing it without a bit of
refactoring gets extremely ugly.

Support is basically ported from AArch64ISelLowering. The main difference here
is that tail calls in `-tailcallopt` change the ABI, so there's some extra
bookkeeping for the stack.

Show that we are correctly lowering these by updating tail-call.ll.

Also show that we don't do anything strange in general by updating
fastcc-reserved.ll, which passes `-tailcallopt`, but doesn't emit any tail
calls.

Differential Revision: https://reviews.llvm.org/D67580

llvm-svn: 372177
2019-09-17 20:24:23 +00:00
..
AArch64 [AArch64][GlobalISel] Support -tailcallopt 2019-09-17 20:24:23 +00:00
AMDGPU [AMDGPU]: PHI Elimination hooks added for custom COPY insertion. Fixed 2019-09-17 09:08:58 +00:00
ARC
ARM [ARM] Fixup pipeline test. NFC 2019-09-17 15:25:24 +00:00
AVR
BPF [BPF] Fix bpf llvm-objdump issues. 2019-08-17 22:12:00 +00:00
Generic Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."" 2019-09-10 10:39:09 +00:00
Hexagon [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
Inputs
Lanai [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
MIR [PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC 2019-09-13 14:18:36 +00:00
MSP430
Mips [MIPS GlobalISel] Select indirect branch 2019-09-12 11:44:36 +00:00
NVPTX
PowerPC [PowerPC] Exploit single instruction load-and-splat for word and doubleword 2019-09-17 16:45:20 +00:00
RISCV [RISCV] Switch to the Machine Scheduler 2019-09-17 11:15:35 +00:00
SPARC [test] Fix tests when run on windows after SVN r369426. NFC. 2019-08-20 20:58:02 +00:00
SystemZ [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
Thumb [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
Thumb2 [ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores 2019-09-17 15:32:28 +00:00
WebAssembly [WebAssembly] Narrowing and widening SIMD ops 2019-09-13 22:54:41 +00:00
WinCFGuard
WinEH [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
X86 [X86] Simplify b2b KSHIFTL+KSHIFTR using demanded elts. 2019-09-17 18:02:56 +00:00
XCore