Craig Topper 50f3d1452c [X86] Clzero intrinsic and its addition under znver1 ... This patch does the following. 1. Adds an Intrinsic int_x86_clzero which works with __builtin_ia32_clzero 2. Identifies clzero feature using cpuid info. (Function:8000_0008, Checks if EBX[0]=1) 3. Adds the clzero feature under znver1 architecture. 4. The custom inserter is added in Lowering. 5. A testcase is added to check the intrinsic. 6. The clzero instruction is added to assembler test. Patch by Ganesh Gopalasubramanian with a couple formatting tweaks, a disassembler test, and using update_llc_test.py from me. Differential revision: https://reviews.llvm.org/D29385 llvm-svn: 294558		2017-02-09 04:27:34 +00:00
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AArch64	Revert r294437 as it broke an asan buildbot.	2017-02-08 21:41:16 +00:00
AMDGPU	Reapply [AMDGPU][mc][tests][NFC] Add coverage/smoke tests for Gfx7 and Gfx8.	2017-01-30 21:59:21 +00:00
ARM	[ARM] Saturation instructions are DSP-only	2016-07-25 22:25:25 +00:00
Hexagon	[Hexagon] Adding gp+ to the syntax of gp-relative instructions	2017-02-06 23:18:57 +00:00
Lanai	[lanai] Add Lanai backend.	2016-03-28 13:09:54 +00:00
Mips	[mips] Correct c.cond.fmt instruction definition.	2017-01-16 13:55:58 +00:00
PowerPC	Add some Book-E instructions to the asm parser and printer.	2017-01-29 04:55:57 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Support remaining atomic instructions	2016-12-02 18:24:16 +00:00
X86	[X86] Clzero intrinsic and its addition under znver1	2017-02-09 04:27:34 +00:00
XCore	…