..
AArch64
[CodeGenPrepare] Generalize inserted set from truncs to any inst.
2015-06-17 20:44:32 +00:00
AMDGPU
Revert "Revert "Fix merges of non-zero vector stores""
2015-06-16 15:51:48 +00:00
ARM
[ARM] Disabling vfp4 should disable fp16
2015-06-12 09:38:51 +00:00
BPF
[bpf] rename triple names bpf_be -> bpfeb
2015-06-05 16:11:14 +00:00
CPP
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
Generic
Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format).
2015-05-27 18:02:19 +00:00
Hexagon
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
2015-06-17 20:29:33 +00:00
Inputs
IR: Give 'DI' prefix to debug info metadata
2015-04-29 16:38:44 +00:00
MIR
MIR Parser: Report an error when a machine function doesn't have a corresponding function.
2015-06-16 17:06:29 +00:00
MSP430
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
Mips
[mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.
2015-06-02 20:32:50 +00:00
NVPTX
Reapply 239795 - [InstCombine] Propagate non-null facts to call parameters
2015-06-16 20:24:25 +00:00
PowerPC
Properly handle the mftb instruction.
2015-06-16 16:01:15 +00:00
SPARC
Add support for the Sparc implementation-defined "ASR" registers.
2015-05-18 16:29:48 +00:00
SystemZ
[DAGCombiner] Account for getVectorIdxTy() when narrowing vector load
2015-05-05 19:34:10 +00:00
Thumb
Revert r238473, "Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM."
2015-06-05 18:01:28 +00:00
Thumb2
ARM: Thumb2 LDRD/STRD supports independent input/output regs
2015-06-03 16:30:24 +00:00
WinEH
[WinEH] C++ EH state numbering fixes
2015-05-20 23:22:24 +00:00
X86
AVX-512: cvtusi2ss/d intrinsics.
2015-06-17 07:23:57 +00:00
XCore
IR: Give 'DI' prefix to debug info metadata
2015-04-29 16:38:44 +00:00