llvm-project/llvm/test/CodeGen
Simon Pilgrim f319074824 [X86] combineConcatVectorOps - combine X86ISD::PACKSS ops 2020-02-10 17:48:02 +00:00
..
AArch64 [AArch64][SVE] SVE2 intrinsics for complex integer arithmetic 2020-02-10 12:14:56 +00:00
AMDGPU [SelectionDAG] Optimize build_vector of truncates and shifts 2020-02-10 15:04:07 +01:00
ARC
ARM Revert "[ARM] Improve codegen of volatile load/store of i64" 2020-02-08 13:18:45 +00:00
AVR
BPF [BPF] disable ReduceLoadWidth during SelectionDag phase 2020-02-04 18:37:43 -08:00
Generic [CodeGenPrepare] Make TargetPassConfig required 2020-02-02 09:28:45 -08:00
Hexagon [Hexagon] Add REQUIRES: asserts to a testcase using -debug-only 2020-01-21 13:22:01 -06:00
Inputs
Lanai Revert "[Support] make report_fatal_error `abort` instead of `exit`" 2020-01-15 17:52:25 -08:00
MIR AMDGPU: Split denormal mode tracking bits 2020-02-04 10:44:21 -08:00
MSP430
Mips GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ 2020-02-09 18:11:43 -05:00
NVPTX Consolidate internal denormal flushing controls 2020-01-17 20:09:53 -05:00
PowerPC [PowerPC] Fix spilling of vector registers in PEI of EH aware functions 2020-02-07 14:41:52 -06:00
RISCV [RISCV] Fix incorrect FP base CFI offset for variable argument functions 2020-02-10 11:56:08 +08:00
SPARC Revert "[Support] make report_fatal_error `abort` instead of `exit`" 2020-01-15 17:52:25 -08:00
SystemZ [SystemZ] Add implementation for the intrinsic llvm.read_register 2020-02-10 08:19:10 -05:00
Thumb
Thumb2 [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
VE [VE] half fptrunc+store&load+fpext 2020-02-04 17:16:09 +01:00
WebAssembly [WebAssembly] Fix signature of __powitf2 libcall 2020-02-07 20:30:47 -08:00
WinCFGuard
WinEH
X86 [X86] combineConcatVectorOps - combine X86ISD::PACKSS ops 2020-02-10 17:48:02 +00:00
XCore Revert "[Support] make report_fatal_error `abort` instead of `exit`" 2020-01-15 17:52:25 -08:00