forked from OSchip/llvm-project
31fa8025ba
Three new instructions: umonitor - Sets up a linear address range to be monitored by hardware and activates the monitor. The address range should be a writeback memory caching type. umwait - A hint that allows the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events. tpause - Directs the processor to enter an implementation-dependent optimized state until the TSC reaches the value in EDX:EAX. Also modifying the description of the mfence instruction, as the rep prefix (0xF3) was allowed before, which would conflict with umonitor during disassembly. Before: $ echo 0xf3,0x0f,0xae,0xf0 | llvm-mc -disassemble .text mfence After: $ echo 0xf3,0x0f,0xae,0xf0 | llvm-mc -disassemble .text umonitor %rax Reviewers: craig.topper, zvi Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45253 llvm-svn: 330462 |
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.. | ||
amd3dnow.txt | ||
avx-512.txt | ||
fp-stack.txt | ||
gather-novsib.txt | ||
hex-immediates.txt | ||
intel-syntax-32.txt | ||
intel-syntax.txt | ||
invalid-VEX-vvvv.txt | ||
lit.local.cfg | ||
marked-up.txt | ||
missing-sib.txt | ||
moffs.txt | ||
padlock.txt | ||
prefixes-i386.txt | ||
prefixes-x86_64.txt | ||
prefixes.txt | ||
simple-tests.txt | ||
truncated-input.txt | ||
x86-16.txt | ||
x86-32.txt | ||
x86-64-err.txt | ||
x86-64.txt |