.. |
CMakeLists.txt
|
fix cmake
|
2012-02-01 22:28:29 +00:00 |
DAGCombiner.cpp
|
Teach the DAGCombiner that certain loadext nodes followed by ANDs can be converted to zeroexts.
|
2012-02-20 12:02:38 +00:00 |
FastISel.cpp
|
Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified.
|
2012-02-22 05:59:10 +00:00 |
FunctionLoweringInfo.cpp
|
Remove the eh.exception and eh.selector intrinsics. Also remove a hack to copy
|
2012-01-31 01:46:13 +00:00 |
InstrEmitter.cpp
|
Handle all live physreg defs in the same place.
|
2012-02-03 20:43:35 +00:00 |
InstrEmitter.h
|
Simplify EXTRACT_SUBREG emission.
|
2011-10-05 20:26:40 +00:00 |
LLVMBuild.txt
|
LLVMBuild: Remove trailing newline, which irked me.
|
2011-12-12 19:48:00 +00:00 |
LegalizeDAG.cpp
|
Rename getExceptionAddressRegister() to getExceptionPointerRegister() for consistency with setExceptionPointerRegister(...).
|
2012-02-14 04:45:49 +00:00 |
LegalizeFloatTypes.cpp
|
Convert assert(0) to llvm_unreachable
|
2012-02-05 08:31:47 +00:00 |
LegalizeIntegerTypes.cpp
|
Convert assert(0) to llvm_unreachable
|
2012-02-05 08:31:47 +00:00 |
LegalizeTypes.cpp
|
Fix PR12000. Some vector operations may use scalar operands with types
|
2012-02-14 13:06:32 +00:00 |
LegalizeTypes.h
|
1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.
|
2011-10-21 11:42:07 +00:00 |
LegalizeTypesGeneric.cpp
|
Remove unnecessary default cases in switches that cover all enum values.
|
2012-01-10 16:47:17 +00:00 |
LegalizeVectorOps.cpp
|
Convert assert(0) to llvm_unreachable
|
2012-02-05 08:31:47 +00:00 |
LegalizeVectorTypes.cpp
|
Added hook to let targets custom lower splitting of illegal vectors
|
2012-02-15 00:55:31 +00:00 |
Makefile
|
…
|
|
ResourcePriorityQueue.cpp
|
VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
|
2012-02-01 22:13:57 +00:00 |
SDNodeDbgValue.h
|
Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
|
2011-02-18 22:43:42 +00:00 |
SDNodeOrdering.h
|
…
|
|
ScheduleDAGFast.cpp
|
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
|
2011-06-28 19:10:37 +00:00 |
ScheduleDAGRRList.cpp
|
Add register mask support to ScheduleDAGRRList.
|
2012-02-13 23:25:24 +00:00 |
ScheduleDAGSDNodes.cpp
|
Rename TargetSubtarget to TargetSubtargetInfo for consistency.
|
2011-07-01 21:01:15 +00:00 |
ScheduleDAGSDNodes.h
|
Add a RegisterMaskSDNode class.
|
2012-01-18 23:52:12 +00:00 |
ScheduleDAGVLIW.cpp
|
VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
|
2012-02-01 22:13:57 +00:00 |
SelectionDAG.cpp
|
Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc.
|
2012-02-10 13:18:44 +00:00 |
SelectionDAGBuilder.cpp
|
Rename getExceptionAddressRegister() to getExceptionPointerRegister() for consistency with setExceptionPointerRegister(...).
|
2012-02-14 04:45:49 +00:00 |
SelectionDAGBuilder.h
|
[unwind removal] Remove all of the code for the dead 'unwind' instruction. There
|
2012-02-06 21:44:22 +00:00 |
SelectionDAGISel.cpp
|
Rename getExceptionAddressRegister() to getExceptionPointerRegister() for consistency with setExceptionPointerRegister(...).
|
2012-02-14 04:45:49 +00:00 |
SelectionDAGPrinter.cpp
|
drop unneeded config.h includes
|
2011-12-22 23:04:07 +00:00 |
TargetLowering.cpp
|
Use the correct ShiftAmtTy for creating shifts after legalization. PR11881. Not committing a testcase because I think it will be too fragile.
|
2012-01-31 01:08:03 +00:00 |
TargetSelectionDAGInfo.cpp
|
Implement a bunch more TargetSelectionDAGInfo infrastructure.
|
2010-05-11 17:31:57 +00:00 |