forked from OSchip/llvm-project
161 lines
7.1 KiB
LLVM
161 lines
7.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE42
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE42
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; unsigned to float v7i16 to v7f32
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define void @convert_v7i16_v7f32(<7 x float>* %dst.addr, <7 x i16> %src) nounwind {
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; X86-SSE2-LABEL: convert_v7i16_v7f32:
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; X86-SSE2: # %bb.0: # %entry
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; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE2-NEXT: pxor %xmm1, %xmm1
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; X86-SSE2-NEXT: movdqa %xmm0, %xmm2
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; X86-SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
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; X86-SSE2-NEXT: cvtdq2ps %xmm2, %xmm2
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; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-SSE2-NEXT: movups %xmm0, (%eax)
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; X86-SSE2-NEXT: movss %xmm2, 16(%eax)
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; X86-SSE2-NEXT: movaps %xmm2, %xmm0
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; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm2[1]
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; X86-SSE2-NEXT: movss %xmm0, 24(%eax)
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; X86-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3]
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; X86-SSE2-NEXT: movss %xmm2, 20(%eax)
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; X86-SSE2-NEXT: retl
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;
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; X86-SSE42-LABEL: convert_v7i16_v7f32:
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; X86-SSE42: # %bb.0: # %entry
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; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE42-NEXT: pxor %xmm1, %xmm1
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; X86-SSE42-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
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; X86-SSE42-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-SSE42-NEXT: cvtdq2ps %xmm2, %xmm1
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; X86-SSE42-NEXT: extractps $2, %xmm0, 24(%eax)
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; X86-SSE42-NEXT: extractps $1, %xmm0, 20(%eax)
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; X86-SSE42-NEXT: movups %xmm1, (%eax)
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; X86-SSE42-NEXT: movss %xmm0, 16(%eax)
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; X86-SSE42-NEXT: retl
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;
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; X64-SSE2-LABEL: convert_v7i16_v7f32:
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; X64-SSE2: # %bb.0: # %entry
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; X64-SSE2-NEXT: pxor %xmm1, %xmm1
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; X64-SSE2-NEXT: movdqa %xmm0, %xmm2
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; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
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; X64-SSE2-NEXT: cvtdq2ps %xmm2, %xmm2
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; X64-SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-SSE2-NEXT: movlps %xmm0, 16(%rdi)
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; X64-SSE2-NEXT: movups %xmm2, (%rdi)
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; X64-SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
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; X64-SSE2-NEXT: movss %xmm0, 24(%rdi)
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; X64-SSE2-NEXT: retq
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;
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; X64-SSE42-LABEL: convert_v7i16_v7f32:
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; X64-SSE42: # %bb.0: # %entry
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; X64-SSE42-NEXT: pxor %xmm1, %xmm1
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; X64-SSE42-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
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; X64-SSE42-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-SSE42-NEXT: cvtdq2ps %xmm2, %xmm1
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; X64-SSE42-NEXT: extractps $2, %xmm0, 24(%rdi)
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; X64-SSE42-NEXT: movlps %xmm0, 16(%rdi)
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; X64-SSE42-NEXT: movups %xmm1, (%rdi)
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; X64-SSE42-NEXT: retq
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entry:
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%val = uitofp <7 x i16> %src to <7 x float>
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store <7 x float> %val, <7 x float>* %dst.addr, align 4
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ret void
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}
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; unsigned to float v3i8 to v3f32
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define void @convert_v3i8_to_v3f32(<3 x float>* %dst.addr, <3 x i8>* %src.addr) nounwind {
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; X86-SSE2-LABEL: convert_v3i8_to_v3f32:
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; X86-SSE2: # %bb.0: # %entry
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; X86-SSE2-NEXT: pushl %ebp
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; X86-SSE2-NEXT: movl %esp, %ebp
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; X86-SSE2-NEXT: andl $-16, %esp
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; X86-SSE2-NEXT: subl $32, %esp
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; X86-SSE2-NEXT: movl 8(%ebp), %eax
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; X86-SSE2-NEXT: movl 12(%ebp), %ecx
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; X86-SSE2-NEXT: movzwl (%ecx), %edx
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; X86-SSE2-NEXT: movd %edx, %xmm0
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; X86-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
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; X86-SSE2-NEXT: movzbl 2(%ecx), %ecx
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; X86-SSE2-NEXT: movdqa %xmm0, (%esp)
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; X86-SSE2-NEXT: movzbl (%esp), %edx
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; X86-SSE2-NEXT: movd %edx, %xmm0
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; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %edx
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; X86-SSE2-NEXT: pinsrw $2, %edx, %xmm0
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; X86-SSE2-NEXT: pinsrw $4, %ecx, %xmm0
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; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-SSE2-NEXT: movss %xmm0, (%eax)
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; X86-SSE2-NEXT: movaps %xmm0, %xmm1
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; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; X86-SSE2-NEXT: movss %xmm1, 8(%eax)
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; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; X86-SSE2-NEXT: movss %xmm0, 4(%eax)
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; X86-SSE2-NEXT: movl %ebp, %esp
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; X86-SSE2-NEXT: popl %ebp
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; X86-SSE2-NEXT: retl
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;
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; X86-SSE42-LABEL: convert_v3i8_to_v3f32:
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; X86-SSE42: # %bb.0: # %entry
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; X86-SSE42-NEXT: pushl %eax
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; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-SSE42-NEXT: movzbl 2(%ecx), %edx
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; X86-SSE42-NEXT: movzwl (%ecx), %ecx
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; X86-SSE42-NEXT: movd %ecx, %xmm0
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; X86-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
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; X86-SSE42-NEXT: pinsrd $2, %edx, %xmm0
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; X86-SSE42-NEXT: pand {{\.LCPI.*}}, %xmm0
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; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-SSE42-NEXT: extractps $2, %xmm0, 8(%eax)
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; X86-SSE42-NEXT: extractps $1, %xmm0, 4(%eax)
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; X86-SSE42-NEXT: movss %xmm0, (%eax)
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; X86-SSE42-NEXT: popl %eax
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; X86-SSE42-NEXT: retl
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;
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; X64-SSE2-LABEL: convert_v3i8_to_v3f32:
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; X64-SSE2: # %bb.0: # %entry
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; X64-SSE2-NEXT: movzwl (%rsi), %eax
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; X64-SSE2-NEXT: movd %eax, %xmm0
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; X64-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
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; X64-SSE2-NEXT: movzbl 2(%rsi), %eax
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; X64-SSE2-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
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; X64-SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx
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; X64-SSE2-NEXT: movd %ecx, %xmm0
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; X64-SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx
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; X64-SSE2-NEXT: pinsrw $2, %ecx, %xmm0
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; X64-SSE2-NEXT: pinsrw $4, %eax, %xmm0
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; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-SSE2-NEXT: movlps %xmm0, (%rdi)
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; X64-SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
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; X64-SSE2-NEXT: movss %xmm0, 8(%rdi)
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; X64-SSE2-NEXT: retq
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;
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; X64-SSE42-LABEL: convert_v3i8_to_v3f32:
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; X64-SSE42: # %bb.0: # %entry
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; X64-SSE42-NEXT: movzbl 2(%rsi), %eax
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; X64-SSE42-NEXT: movzwl (%rsi), %ecx
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; X64-SSE42-NEXT: movd %ecx, %xmm0
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; X64-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
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; X64-SSE42-NEXT: pinsrd $2, %eax, %xmm0
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; X64-SSE42-NEXT: pand {{.*}}(%rip), %xmm0
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; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-SSE42-NEXT: extractps $2, %xmm0, 8(%rdi)
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; X64-SSE42-NEXT: movlps %xmm0, (%rdi)
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; X64-SSE42-NEXT: retq
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entry:
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%load = load <3 x i8>, <3 x i8>* %src.addr, align 1
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%cvt = uitofp <3 x i8> %load to <3 x float>
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store <3 x float> %cvt, <3 x float>* %dst.addr, align 4
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ret void
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}
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