llvm-project

History

Puyan Lotfi fe6c9cbb24 [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. Planning to add support for named vregs. This puts is in a conundrum since physregs are named as well. To rectify this we need to use a sigil other than '%' for physregs in MIR. We've settled on using '$' for physregs but first we must repurpose it from external symbols using it, which is what this commit is all about. We think '&' will have familiar semantics for C/C++ users. llvm-svn: 322146		2018-01-10 00:56:48 +00:00
..
AArch64	[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.	2018-01-10 00:56:48 +00:00
AMDGPU	[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.	2018-01-10 00:56:48 +00:00
ARM	[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.	2018-01-10 00:56:48 +00:00
Generic	[RegAllocFast] Add the proper initialize method to use the .mir infrastructure	2017-07-07 19:25:42 +00:00
Hexagon	[Hexagon] Handle Hexagon-specific machine operand target flags in MIR	2017-07-10 18:31:02 +00:00
Mips	[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.	2018-01-10 00:56:48 +00:00
NVPTX	[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.	2018-01-10 00:56:48 +00:00
PowerPC	MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.	2016-08-24 01:32:41 +00:00
X86	[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.	2018-01-10 00:56:48 +00:00
README	Add README describing the intention of test/CodeGen/MIR	2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.