forked from OSchip/llvm-project
b876c72bcc
Some ARM instructions encode 32-bit immediates as a 8-bit integer (0-255) and a 4-bit rotation (0-30, even) in its least significant 12 bits. The original fixup, FK_Data_4, patches the instruction by the value bit-to-bit, regardless of the encoding. For example, assuming the label L1 and L2 are 0x0 and 0x104 respectively, the following instruction: add r0, r0, #(L2 - L1) ; expects 0x104, i.e., 260 would be assembled to the following, which adds 1 to r0, instead of 260: e2800104 add r0, r0, #4, 2 ; equivalently 1 The new fixup kind fixup_arm_mod_imm takes care of the encoding: e2800f41 add r0, r0, #260 Patch by Ting-Yuan Huang! llvm-svn: 265122 |
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| .. | ||
| ARMAddressingModes.h | ||
| ARMAsmBackend.cpp | ||
| ARMAsmBackend.h | ||
| ARMAsmBackendDarwin.h | ||
| ARMAsmBackendELF.h | ||
| ARMAsmBackendWinCOFF.h | ||
| ARMBaseInfo.h | ||
| ARMELFObjectWriter.cpp | ||
| ARMELFStreamer.cpp | ||
| ARMFixupKinds.h | ||
| ARMMCAsmInfo.cpp | ||
| ARMMCAsmInfo.h | ||
| ARMMCCodeEmitter.cpp | ||
| ARMMCExpr.cpp | ||
| ARMMCExpr.h | ||
| ARMMCTargetDesc.cpp | ||
| ARMMCTargetDesc.h | ||
| ARMMachORelocationInfo.cpp | ||
| ARMMachObjectWriter.cpp | ||
| ARMTargetStreamer.cpp | ||
| ARMUnwindOpAsm.cpp | ||
| ARMUnwindOpAsm.h | ||
| ARMWinCOFFObjectWriter.cpp | ||
| ARMWinCOFFStreamer.cpp | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||