forked from OSchip/llvm-project
6bbe1f0d10
and stores was added. - SelectAddr should return false if Parent is an unaligned f32 load or store. - Only aligned load and store nodes should be matched to select reg+imm floating point instructions. - MIPS does not have support for f64 unaligned load or store instructions. llvm-svn: 151843 |
||
---|---|---|
.. | ||
ARM | ||
CBackend | ||
CPP | ||
CellSPU | ||
Generic | ||
Hexagon | ||
MBlaze | ||
MSP430 | ||
Mips | ||
PTX | ||
PowerPC | ||
SPARC | ||
Thumb | ||
Thumb2 | ||
X86 | ||
XCore |