forked from OSchip/llvm-project
109 lines
4.3 KiB
ArmAsm
109 lines
4.3 KiB
ArmAsm
// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t2
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// RUN: ld.lld %t1 %t2 -o %t
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// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t | FileCheck %s
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// RUN: ld.lld -shared %t1 %t2 -o %t3
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// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSOTHUMB %s
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// RUN: llvm-objdump -triple=armv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSOARM %s
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// RUN: llvm-readobj -s -r %t3 | FileCheck -check-prefix=DSOREL %s
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// REQUIRES: arm
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//
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// Test PLT entry generation
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.syntax unified
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.text
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.align 2
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.globl _start
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.type _start,%function
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_start:
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// FIXME, interworking is only supported for BL via BLX at the moment, when
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// interworking thunks are available for b.w and b<cond>.w this can be altered
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// to test the different forms of interworking.
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bl func1
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bl func2
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bl func3
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// Executable, expect no PLT
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// CHECK: Disassembly of section .text:
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// CHECK-NEXT: func1:
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// CHECK-NEXT: 11000: 70 47 bx lr
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// CHECK: func2:
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// CHECK-NEXT: 11002: 70 47 bx lr
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// CHECK: func3:
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// CHECK-NEXT: 11004: 70 47 bx lr
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// CHECK-NEXT: 11006: d4 d4
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// CHECK: _start:
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// 11008 + 4 -12 = 0x11000 = func1
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// CHECK-NEXT: 11008: ff f7 fa ff bl #-12
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// 1100c + 4 -14 = 0x11002 = func2
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// CHECK-NEXT: 1100c: ff f7 f9 ff bl #-14
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// 11010 + 4 -16 = 0x11004 = func3
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// CHECK-NEXT: 11010: ff f7 f8 ff bl #-16
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// Expect PLT entries as symbols can be preempted
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// .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble
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// as ARM or Thumb. Work around by disassembling twice.
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// DSOTHUMB: Disassembly of section .text:
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// DSOTHUMB: func1:
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// DSOTHUMB-NEXT: 1000: 70 47 bx lr
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// DSOTHUMB: func2:
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// DSOTHUMB-NEXT: 1002: 70 47 bx lr
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// DSOTHUMB: func3:
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// DSOTHUMB-NEXT: 1004: 70 47 bx lr
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// DSOTHUMB-NEXT: 1006: d4 d4
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// DSOTHUMB: _start:
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// 0x1008 + 0x28 + 4 = 0x1034 = PLT func1
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// DSOTHUMB-NEXT: 1008: 00 f0 14 e8 blx #40
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// 0x100c + 0x34 + 4 = 0x1044 = PLT func2
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// DSOTHUMB-NEXT: 100c: 00 f0 1a e8 blx #52
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// 0x1010 + 0x40 + 4 = 0x1054 = PLT func3
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// DSOTHUMB-NEXT: 1010: 00 f0 20 e8 blx #64
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// DSOARM: Disassembly of section .plt:
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// DSOARM-NEXT: $a:
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// DSOARM-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]!
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// DSOARM-NEXT: 1024: 04 e0 9f e5 ldr lr, [pc, #4]
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// DSOARM-NEXT: 1028: 0e e0 8f e0 add lr, pc, lr
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// DSOARM-NEXT: 102c: 08 f0 be e5 ldr pc, [lr, #8]!
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// DSOARM: $d:
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// DSOARM-NEXT: 1030: d0 0f 00 00 .word 0x00000fd0
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// 0x1028 + 8 + 0fd0 = 0x2000
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// DSOARM: $a:
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// DSOARM-NEXT: 1034: 04 c0 9f e5 ldr r12, [pc, #4]
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// DSOARM-NEXT: 1038: 0f c0 8c e0 add r12, r12, pc
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// DSOARM-NEXT: 103c: 00 f0 9c e5 ldr pc, [r12]
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// DSOARM: $d:
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// DSOARM-NEXT: 1040: cc 0f 00 00 .word 0x00000fcc
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// 0x1038 + 8 + 0fcc = 0x200c
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// DSOARM: $a:
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// DSOARM-NEXT: 1044: 04 c0 9f e5 ldr r12, [pc, #4]
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// DSOARM-NEXT: 1048: 0f c0 8c e0 add r12, r12, pc
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// DSOARM-NEXT: 104c: 00 f0 9c e5 ldr pc, [r12]
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// DSOARM: $d:
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// DSOARM-NEXT: 1050: c0 0f 00 00 .word 0x00000fc0
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// 0x1048 + 8 + 0fc0 = 0x2010
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// DSOARM: $a:
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// DSOARM-NEXT: 1054: 04 c0 9f e5 ldr r12, [pc, #4]
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// DSOARM-NEXT: 1058: 0f c0 8c e0 add r12, r12, pc
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// DSOARM-NEXT: 105c: 00 f0 9c e5 ldr pc, [r12]
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// DSOARM: $d:
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// DSOARM-NEXT: 1060: b4 0f 00 00 .word 0x00000fb4
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// 0x1058 + 8 + 0fb4 = 0x2014
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// DSOREL: Name: .got.plt
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// DSOREL-NEXT: Type: SHT_PROGBITS
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// DSOREL-NEXT: Flags [
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// DSOREL-NEXT: SHF_ALLOC
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// DSOREL-NEXT: SHF_WRITE
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// DSOREL-NEXT: ]
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// DSOREL-NEXT: Address: 0x2000
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// DSOREL-NEXT: Offset:
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// DSOREL-NEXT: Size: 24
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// DSOREL-NEXT: Link:
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// DSOREL-NEXT: Info:
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// DSOREL-NEXT: AddressAlignment: 4
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// DSOREL-NEXT: EntrySize:
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// DSOREL: Relocations [
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// DSOREL-NEXT: Section (4) .rel.plt {
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// DSOREL-NEXT: 0x200C R_ARM_JUMP_SLOT func1 0x0
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// DSOREL-NEXT: 0x2010 R_ARM_JUMP_SLOT func2 0x0
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// DSOREL-NEXT: 0x2014 R_ARM_JUMP_SLOT func3 0x0
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