forked from OSchip/llvm-project
660 lines
18 KiB
LLVM
660 lines
18 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips2 | FileCheck %s \
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; RUN: -check-prefix=MIPS
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; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32 | FileCheck %s \
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; RUN: -check-prefix=MIPS
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; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 | FileCheck %s \
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; RUN: -check-prefix=MIPS32R2
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; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 | FileCheck %s \
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; RUN: -check-prefix=MIPS32R2
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; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r5 | FileCheck %s \
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; RUN: -check-prefix=MIPS32R2
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; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 | FileCheck %s \
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; RUN: -check-prefix=MIPS32R6
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; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips3 | FileCheck %s \
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; RUN: -check-prefix=MIPS64
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; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 | FileCheck %s \
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; RUN: -check-prefix=MIPS64
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; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 | FileCheck %s \
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; RUN: -check-prefix=MIPS64
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; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 | FileCheck %s \
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; RUN: -check-prefix=MIPS64R2
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; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r3 | FileCheck %s \
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; RUN: -check-prefix=MIPS64R2
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; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r5 | FileCheck %s \
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; RUN: -check-prefix=MIPS64R2
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; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 | FileCheck %s \
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; RUN: -check-prefix=MIPS64R6
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; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
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; RUN: -check-prefix=MM32R3
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; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
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; RUN: -check-prefix=MM32R6
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define signext i32 @bittest_10_i32(i32 signext %a) nounwind {
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; MIPS-LABEL: bittest_10_i32:
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; MIPS: # %bb.0:
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; MIPS-NEXT: andi $1, $4, 1024
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; MIPS-NEXT: jr $ra
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; MIPS-NEXT: sltiu $2, $1, 1
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;
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; MIPS32R2-LABEL: bittest_10_i32:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: andi $1, $4, 1024
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: sltiu $2, $1, 1
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;
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; MIPS32R6-LABEL: bittest_10_i32:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: andi $1, $4, 1024
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: sltiu $2, $1, 1
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;
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; MIPS64-LABEL: bittest_10_i32:
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; MIPS64: # %bb.0:
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; MIPS64-NEXT: andi $1, $4, 1024
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; MIPS64-NEXT: sltiu $1, $1, 1
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; MIPS64-NEXT: dsll $1, $1, 32
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: dsrl $2, $1, 32
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;
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; MIPS64R2-LABEL: bittest_10_i32:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: andi $1, $4, 1024
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; MIPS64R2-NEXT: sltiu $1, $1, 1
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: dext $2, $1, 0, 32
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;
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; MIPS64R6-LABEL: bittest_10_i32:
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; MIPS64R6: # %bb.0:
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; MIPS64R6-NEXT: andi $1, $4, 1024
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; MIPS64R6-NEXT: sltiu $1, $1, 1
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; MIPS64R6-NEXT: jr $ra
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; MIPS64R6-NEXT: dext $2, $1, 0, 32
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;
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; MM32R3-LABEL: bittest_10_i32:
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; MM32R3: # %bb.0:
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; MM32R3-NEXT: andi $1, $4, 1024
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; MM32R3-NEXT: jr $ra
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; MM32R3-NEXT: sltiu $2, $1, 1
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;
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; MM32R6-LABEL: bittest_10_i32:
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; MM32R6: # %bb.0:
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; MM32R6-NEXT: andi $1, $4, 1024
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; MM32R6-NEXT: sltiu $2, $1, 1
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; MM32R6-NEXT: jrc $ra
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%shr = lshr i32 %a, 10
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%not = xor i32 %shr, -1
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%and = and i32 %not, 1
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ret i32 %and
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}
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define signext i32 @bittest_15_i32(i32 signext %a) nounwind {
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; MIPS-LABEL: bittest_15_i32:
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; MIPS: # %bb.0:
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; MIPS-NEXT: andi $1, $4, 32768
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; MIPS-NEXT: jr $ra
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; MIPS-NEXT: sltiu $2, $1, 1
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;
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; MIPS32R2-LABEL: bittest_15_i32:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: andi $1, $4, 32768
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: sltiu $2, $1, 1
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;
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; MIPS32R6-LABEL: bittest_15_i32:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: andi $1, $4, 32768
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: sltiu $2, $1, 1
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;
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; MIPS64-LABEL: bittest_15_i32:
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; MIPS64: # %bb.0:
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; MIPS64-NEXT: andi $1, $4, 32768
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; MIPS64-NEXT: sltiu $1, $1, 1
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; MIPS64-NEXT: dsll $1, $1, 32
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: dsrl $2, $1, 32
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;
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; MIPS64R2-LABEL: bittest_15_i32:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: andi $1, $4, 32768
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; MIPS64R2-NEXT: sltiu $1, $1, 1
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: dext $2, $1, 0, 32
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;
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; MIPS64R6-LABEL: bittest_15_i32:
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; MIPS64R6: # %bb.0:
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; MIPS64R6-NEXT: andi $1, $4, 32768
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; MIPS64R6-NEXT: sltiu $1, $1, 1
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; MIPS64R6-NEXT: jr $ra
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; MIPS64R6-NEXT: dext $2, $1, 0, 32
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;
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; MM32R3-LABEL: bittest_15_i32:
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; MM32R3: # %bb.0:
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; MM32R3-NEXT: andi16 $2, $4, 32768
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; MM32R3-NEXT: jr $ra
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; MM32R3-NEXT: sltiu $2, $2, 1
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;
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; MM32R6-LABEL: bittest_15_i32:
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; MM32R6: # %bb.0:
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; MM32R6-NEXT: andi16 $2, $4, 32768
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; MM32R6-NEXT: sltiu $2, $2, 1
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; MM32R6-NEXT: jrc $ra
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%shr = lshr i32 %a, 15
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%not = xor i32 %shr, -1
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%and = and i32 %not, 1
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ret i32 %and
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}
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define signext i32 @bittest_16_i32(i32 signext %a) nounwind {
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; MIPS-LABEL: bittest_16_i32:
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; MIPS: # %bb.0:
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; MIPS-NEXT: srl $1, $4, 16
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; MIPS-NEXT: not $1, $1
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; MIPS-NEXT: jr $ra
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; MIPS-NEXT: andi $2, $1, 1
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;
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; MIPS32R2-LABEL: bittest_16_i32:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: srl $1, $4, 16
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; MIPS32R2-NEXT: not $1, $1
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: andi $2, $1, 1
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;
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; MIPS32R6-LABEL: bittest_16_i32:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: srl $1, $4, 16
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; MIPS32R6-NEXT: not $1, $1
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: andi $2, $1, 1
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;
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; MIPS64-LABEL: bittest_16_i32:
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; MIPS64: # %bb.0:
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; MIPS64-NEXT: srl $1, $4, 16
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; MIPS64-NEXT: not $1, $1
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; MIPS64-NEXT: andi $1, $1, 1
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; MIPS64-NEXT: dsll $1, $1, 32
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: dsrl $2, $1, 32
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;
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; MIPS64R2-LABEL: bittest_16_i32:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: srl $1, $4, 16
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; MIPS64R2-NEXT: not $1, $1
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; MIPS64R2-NEXT: andi $1, $1, 1
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: dext $2, $1, 0, 32
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;
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; MIPS64R6-LABEL: bittest_16_i32:
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; MIPS64R6: # %bb.0:
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; MIPS64R6-NEXT: srl $1, $4, 16
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; MIPS64R6-NEXT: not $1, $1
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; MIPS64R6-NEXT: andi $1, $1, 1
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; MIPS64R6-NEXT: jr $ra
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; MIPS64R6-NEXT: dext $2, $1, 0, 32
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;
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; MM32R3-LABEL: bittest_16_i32:
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; MM32R3: # %bb.0:
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; MM32R3-NEXT: srl $2, $4, 16
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; MM32R3-NEXT: not16 $2, $2
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; MM32R3-NEXT: andi16 $2, $2, 1
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; MM32R3-NEXT: jrc $ra
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;
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; MM32R6-LABEL: bittest_16_i32:
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; MM32R6: # %bb.0:
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; MM32R6-NEXT: srl $2, $4, 16
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; MM32R6-NEXT: not16 $2, $2
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; MM32R6-NEXT: andi16 $2, $2, 1
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; MM32R6-NEXT: jrc $ra
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%shr = lshr i32 %a, 16
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%not = xor i32 %shr, -1
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%and = and i32 %not, 1
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ret i32 %and
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}
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define signext i32 @bittest_31_i32(i32 signext %a) nounwind {
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; MIPS-LABEL: bittest_31_i32:
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; MIPS: # %bb.0:
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; MIPS-NEXT: not $1, $4
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; MIPS-NEXT: jr $ra
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; MIPS-NEXT: srl $2, $1, 31
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;
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; MIPS32R2-LABEL: bittest_31_i32:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: not $1, $4
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: srl $2, $1, 31
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;
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; MIPS32R6-LABEL: bittest_31_i32:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: not $1, $4
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: srl $2, $1, 31
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;
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; MIPS64-LABEL: bittest_31_i32:
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; MIPS64: # %bb.0:
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; MIPS64-NEXT: not $1, $4
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; MIPS64-NEXT: srl $1, $1, 31
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; MIPS64-NEXT: dsll $1, $1, 32
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: dsrl $2, $1, 32
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;
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; MIPS64R2-LABEL: bittest_31_i32:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: not $1, $4
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; MIPS64R2-NEXT: srl $1, $1, 31
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: dext $2, $1, 0, 32
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;
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; MIPS64R6-LABEL: bittest_31_i32:
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; MIPS64R6: # %bb.0:
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; MIPS64R6-NEXT: not $1, $4
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; MIPS64R6-NEXT: srl $1, $1, 31
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; MIPS64R6-NEXT: jr $ra
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; MIPS64R6-NEXT: dext $2, $1, 0, 32
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;
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; MM32R3-LABEL: bittest_31_i32:
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; MM32R3: # %bb.0:
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; MM32R3-NEXT: not16 $2, $4
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; MM32R3-NEXT: jr $ra
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; MM32R3-NEXT: srl $2, $2, 31
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;
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; MM32R6-LABEL: bittest_31_i32:
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; MM32R6: # %bb.0:
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; MM32R6-NEXT: not16 $2, $4
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; MM32R6-NEXT: srl $2, $2, 31
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; MM32R6-NEXT: jrc $ra
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%shr = lshr i32 %a, 31
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%not = xor i32 %shr, -1
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%and = and i32 %not, 1
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ret i32 %and
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}
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define i64 @bittest_10_i64(i64 %a) nounwind {
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; MIPS-LABEL: bittest_10_i64:
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; MIPS: # %bb.0:
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; MIPS-NEXT: andi $1, $5, 1024
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; MIPS-NEXT: sltiu $3, $1, 1
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; MIPS-NEXT: jr $ra
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; MIPS-NEXT: addiu $2, $zero, 0
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;
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; MIPS32R2-LABEL: bittest_10_i64:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: andi $1, $5, 1024
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; MIPS32R2-NEXT: sltiu $3, $1, 1
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: addiu $2, $zero, 0
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;
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; MIPS32R6-LABEL: bittest_10_i64:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: andi $1, $5, 1024
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; MIPS32R6-NEXT: sltiu $3, $1, 1
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: addiu $2, $zero, 0
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;
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; MIPS64-LABEL: bittest_10_i64:
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; MIPS64: # %bb.0:
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; MIPS64-NEXT: andi $1, $4, 1024
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; MIPS64-NEXT: sltiu $1, $1, 1
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; MIPS64-NEXT: dsll $1, $1, 32
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: dsrl $2, $1, 32
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;
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; MIPS64R2-LABEL: bittest_10_i64:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: andi $1, $4, 1024
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; MIPS64R2-NEXT: sltiu $1, $1, 1
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: dext $2, $1, 0, 32
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;
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; MIPS64R6-LABEL: bittest_10_i64:
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; MIPS64R6: # %bb.0:
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; MIPS64R6-NEXT: andi $1, $4, 1024
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; MIPS64R6-NEXT: sltiu $1, $1, 1
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; MIPS64R6-NEXT: jr $ra
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; MIPS64R6-NEXT: dext $2, $1, 0, 32
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;
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; MM32R3-LABEL: bittest_10_i64:
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; MM32R3: # %bb.0:
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; MM32R3-NEXT: andi $1, $5, 1024
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; MM32R3-NEXT: li16 $2, 0
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; MM32R3-NEXT: jr $ra
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; MM32R3-NEXT: sltiu $3, $1, 1
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;
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; MM32R6-LABEL: bittest_10_i64:
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; MM32R6: # %bb.0:
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; MM32R6-NEXT: andi $1, $5, 1024
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; MM32R6-NEXT: sltiu $3, $1, 1
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; MM32R6-NEXT: li16 $2, 0
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; MM32R6-NEXT: jrc $ra
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%shr = lshr i64 %a, 10
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%not = xor i64 %shr, -1
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%and = and i64 %not, 1
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ret i64 %and
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}
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define i64 @bittest_15_i64(i64 %a) nounwind {
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; MIPS-LABEL: bittest_15_i64:
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; MIPS: # %bb.0:
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; MIPS-NEXT: andi $1, $5, 32768
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; MIPS-NEXT: sltiu $3, $1, 1
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; MIPS-NEXT: jr $ra
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; MIPS-NEXT: addiu $2, $zero, 0
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;
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; MIPS32R2-LABEL: bittest_15_i64:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: andi $1, $5, 32768
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; MIPS32R2-NEXT: sltiu $3, $1, 1
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: addiu $2, $zero, 0
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;
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; MIPS32R6-LABEL: bittest_15_i64:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: andi $1, $5, 32768
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; MIPS32R6-NEXT: sltiu $3, $1, 1
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: addiu $2, $zero, 0
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;
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; MIPS64-LABEL: bittest_15_i64:
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; MIPS64: # %bb.0:
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; MIPS64-NEXT: andi $1, $4, 32768
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; MIPS64-NEXT: sltiu $1, $1, 1
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; MIPS64-NEXT: dsll $1, $1, 32
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: dsrl $2, $1, 32
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;
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; MIPS64R2-LABEL: bittest_15_i64:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: andi $1, $4, 32768
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; MIPS64R2-NEXT: sltiu $1, $1, 1
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: dext $2, $1, 0, 32
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;
|
|
; MIPS64R6-LABEL: bittest_15_i64:
|
|
; MIPS64R6: # %bb.0:
|
|
; MIPS64R6-NEXT: andi $1, $4, 32768
|
|
; MIPS64R6-NEXT: sltiu $1, $1, 1
|
|
; MIPS64R6-NEXT: jr $ra
|
|
; MIPS64R6-NEXT: dext $2, $1, 0, 32
|
|
;
|
|
; MM32R3-LABEL: bittest_15_i64:
|
|
; MM32R3: # %bb.0:
|
|
; MM32R3-NEXT: andi16 $2, $5, 32768
|
|
; MM32R3-NEXT: sltiu $3, $2, 1
|
|
; MM32R3-NEXT: li16 $2, 0
|
|
; MM32R3-NEXT: jrc $ra
|
|
;
|
|
; MM32R6-LABEL: bittest_15_i64:
|
|
; MM32R6: # %bb.0:
|
|
; MM32R6-NEXT: andi16 $2, $5, 32768
|
|
; MM32R6-NEXT: sltiu $3, $2, 1
|
|
; MM32R6-NEXT: li16 $2, 0
|
|
; MM32R6-NEXT: jrc $ra
|
|
%shr = lshr i64 %a, 15
|
|
%not = xor i64 %shr, -1
|
|
%and = and i64 %not, 1
|
|
ret i64 %and
|
|
}
|
|
|
|
define i64 @bittest_16_i64(i64 %a) nounwind {
|
|
; MIPS-LABEL: bittest_16_i64:
|
|
; MIPS: # %bb.0:
|
|
; MIPS-NEXT: srl $1, $5, 16
|
|
; MIPS-NEXT: not $1, $1
|
|
; MIPS-NEXT: andi $3, $1, 1
|
|
; MIPS-NEXT: jr $ra
|
|
; MIPS-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS32R2-LABEL: bittest_16_i64:
|
|
; MIPS32R2: # %bb.0:
|
|
; MIPS32R2-NEXT: srl $1, $5, 16
|
|
; MIPS32R2-NEXT: not $1, $1
|
|
; MIPS32R2-NEXT: andi $3, $1, 1
|
|
; MIPS32R2-NEXT: jr $ra
|
|
; MIPS32R2-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS32R6-LABEL: bittest_16_i64:
|
|
; MIPS32R6: # %bb.0:
|
|
; MIPS32R6-NEXT: srl $1, $5, 16
|
|
; MIPS32R6-NEXT: not $1, $1
|
|
; MIPS32R6-NEXT: andi $3, $1, 1
|
|
; MIPS32R6-NEXT: jr $ra
|
|
; MIPS32R6-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS64-LABEL: bittest_16_i64:
|
|
; MIPS64: # %bb.0:
|
|
; MIPS64-NEXT: dsrl $1, $4, 16
|
|
; MIPS64-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64-NEXT: xor $1, $1, $2
|
|
; MIPS64-NEXT: jr $ra
|
|
; MIPS64-NEXT: andi $2, $1, 1
|
|
;
|
|
; MIPS64R2-LABEL: bittest_16_i64:
|
|
; MIPS64R2: # %bb.0:
|
|
; MIPS64R2-NEXT: dsrl $1, $4, 16
|
|
; MIPS64R2-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64R2-NEXT: xor $1, $1, $2
|
|
; MIPS64R2-NEXT: jr $ra
|
|
; MIPS64R2-NEXT: andi $2, $1, 1
|
|
;
|
|
; MIPS64R6-LABEL: bittest_16_i64:
|
|
; MIPS64R6: # %bb.0:
|
|
; MIPS64R6-NEXT: dsrl $1, $4, 16
|
|
; MIPS64R6-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64R6-NEXT: xor $1, $1, $2
|
|
; MIPS64R6-NEXT: jr $ra
|
|
; MIPS64R6-NEXT: andi $2, $1, 1
|
|
;
|
|
; MM32R3-LABEL: bittest_16_i64:
|
|
; MM32R3: # %bb.0:
|
|
; MM32R3-NEXT: srl $2, $5, 16
|
|
; MM32R3-NEXT: not16 $2, $2
|
|
; MM32R3-NEXT: andi16 $3, $2, 1
|
|
; MM32R3-NEXT: li16 $2, 0
|
|
; MM32R3-NEXT: jrc $ra
|
|
;
|
|
; MM32R6-LABEL: bittest_16_i64:
|
|
; MM32R6: # %bb.0:
|
|
; MM32R6-NEXT: srl $2, $5, 16
|
|
; MM32R6-NEXT: not16 $2, $2
|
|
; MM32R6-NEXT: andi16 $3, $2, 1
|
|
; MM32R6-NEXT: li16 $2, 0
|
|
; MM32R6-NEXT: jrc $ra
|
|
%shr = lshr i64 %a, 16
|
|
%not = xor i64 %shr, -1
|
|
%and = and i64 %not, 1
|
|
ret i64 %and
|
|
}
|
|
|
|
define i64 @bittest_31_i64(i64 %a) nounwind {
|
|
; MIPS-LABEL: bittest_31_i64:
|
|
; MIPS: # %bb.0:
|
|
; MIPS-NEXT: not $1, $5
|
|
; MIPS-NEXT: srl $3, $1, 31
|
|
; MIPS-NEXT: jr $ra
|
|
; MIPS-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS32R2-LABEL: bittest_31_i64:
|
|
; MIPS32R2: # %bb.0:
|
|
; MIPS32R2-NEXT: not $1, $5
|
|
; MIPS32R2-NEXT: srl $3, $1, 31
|
|
; MIPS32R2-NEXT: jr $ra
|
|
; MIPS32R2-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS32R6-LABEL: bittest_31_i64:
|
|
; MIPS32R6: # %bb.0:
|
|
; MIPS32R6-NEXT: not $1, $5
|
|
; MIPS32R6-NEXT: srl $3, $1, 31
|
|
; MIPS32R6-NEXT: jr $ra
|
|
; MIPS32R6-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS64-LABEL: bittest_31_i64:
|
|
; MIPS64: # %bb.0:
|
|
; MIPS64-NEXT: dsrl $1, $4, 31
|
|
; MIPS64-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64-NEXT: xor $1, $1, $2
|
|
; MIPS64-NEXT: jr $ra
|
|
; MIPS64-NEXT: andi $2, $1, 1
|
|
;
|
|
; MIPS64R2-LABEL: bittest_31_i64:
|
|
; MIPS64R2: # %bb.0:
|
|
; MIPS64R2-NEXT: dsrl $1, $4, 31
|
|
; MIPS64R2-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64R2-NEXT: xor $1, $1, $2
|
|
; MIPS64R2-NEXT: jr $ra
|
|
; MIPS64R2-NEXT: andi $2, $1, 1
|
|
;
|
|
; MIPS64R6-LABEL: bittest_31_i64:
|
|
; MIPS64R6: # %bb.0:
|
|
; MIPS64R6-NEXT: dsrl $1, $4, 31
|
|
; MIPS64R6-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64R6-NEXT: xor $1, $1, $2
|
|
; MIPS64R6-NEXT: jr $ra
|
|
; MIPS64R6-NEXT: andi $2, $1, 1
|
|
;
|
|
; MM32R3-LABEL: bittest_31_i64:
|
|
; MM32R3: # %bb.0:
|
|
; MM32R3-NEXT: not16 $2, $5
|
|
; MM32R3-NEXT: srl $3, $2, 31
|
|
; MM32R3-NEXT: li16 $2, 0
|
|
; MM32R3-NEXT: jrc $ra
|
|
;
|
|
; MM32R6-LABEL: bittest_31_i64:
|
|
; MM32R6: # %bb.0:
|
|
; MM32R6-NEXT: not16 $2, $5
|
|
; MM32R6-NEXT: srl $3, $2, 31
|
|
; MM32R6-NEXT: li16 $2, 0
|
|
; MM32R6-NEXT: jrc $ra
|
|
%shr = lshr i64 %a, 31
|
|
%not = xor i64 %shr, -1
|
|
%and = and i64 %not, 1
|
|
ret i64 %and
|
|
}
|
|
|
|
define i64 @bittest_32_i64(i64 %a) nounwind {
|
|
; MIPS-LABEL: bittest_32_i64:
|
|
; MIPS: # %bb.0:
|
|
; MIPS-NEXT: not $1, $4
|
|
; MIPS-NEXT: andi $3, $1, 1
|
|
; MIPS-NEXT: jr $ra
|
|
; MIPS-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS32R2-LABEL: bittest_32_i64:
|
|
; MIPS32R2: # %bb.0:
|
|
; MIPS32R2-NEXT: not $1, $4
|
|
; MIPS32R2-NEXT: andi $3, $1, 1
|
|
; MIPS32R2-NEXT: jr $ra
|
|
; MIPS32R2-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS32R6-LABEL: bittest_32_i64:
|
|
; MIPS32R6: # %bb.0:
|
|
; MIPS32R6-NEXT: not $1, $4
|
|
; MIPS32R6-NEXT: andi $3, $1, 1
|
|
; MIPS32R6-NEXT: jr $ra
|
|
; MIPS32R6-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS64-LABEL: bittest_32_i64:
|
|
; MIPS64: # %bb.0:
|
|
; MIPS64-NEXT: dsrl $1, $4, 32
|
|
; MIPS64-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64-NEXT: xor $1, $1, $2
|
|
; MIPS64-NEXT: jr $ra
|
|
; MIPS64-NEXT: andi $2, $1, 1
|
|
;
|
|
; MIPS64R2-LABEL: bittest_32_i64:
|
|
; MIPS64R2: # %bb.0:
|
|
; MIPS64R2-NEXT: dsrl $1, $4, 32
|
|
; MIPS64R2-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64R2-NEXT: xor $1, $1, $2
|
|
; MIPS64R2-NEXT: jr $ra
|
|
; MIPS64R2-NEXT: andi $2, $1, 1
|
|
;
|
|
; MIPS64R6-LABEL: bittest_32_i64:
|
|
; MIPS64R6: # %bb.0:
|
|
; MIPS64R6-NEXT: dsrl $1, $4, 32
|
|
; MIPS64R6-NEXT: daddiu $2, $zero, -1
|
|
; MIPS64R6-NEXT: xor $1, $1, $2
|
|
; MIPS64R6-NEXT: jr $ra
|
|
; MIPS64R6-NEXT: andi $2, $1, 1
|
|
;
|
|
; MM32R3-LABEL: bittest_32_i64:
|
|
; MM32R3: # %bb.0:
|
|
; MM32R3-NEXT: not16 $2, $4
|
|
; MM32R3-NEXT: andi16 $3, $2, 1
|
|
; MM32R3-NEXT: li16 $2, 0
|
|
; MM32R3-NEXT: jrc $ra
|
|
;
|
|
; MM32R6-LABEL: bittest_32_i64:
|
|
; MM32R6: # %bb.0:
|
|
; MM32R6-NEXT: not16 $2, $4
|
|
; MM32R6-NEXT: andi16 $3, $2, 1
|
|
; MM32R6-NEXT: li16 $2, 0
|
|
; MM32R6-NEXT: jrc $ra
|
|
%shr = lshr i64 %a, 32
|
|
%not = xor i64 %shr, -1
|
|
%and = and i64 %not, 1
|
|
ret i64 %and
|
|
}
|
|
|
|
define i64 @bittest_63_i64(i64 %a) nounwind {
|
|
; MIPS-LABEL: bittest_63_i64:
|
|
; MIPS: # %bb.0:
|
|
; MIPS-NEXT: not $1, $4
|
|
; MIPS-NEXT: srl $3, $1, 31
|
|
; MIPS-NEXT: jr $ra
|
|
; MIPS-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS32R2-LABEL: bittest_63_i64:
|
|
; MIPS32R2: # %bb.0:
|
|
; MIPS32R2-NEXT: not $1, $4
|
|
; MIPS32R2-NEXT: srl $3, $1, 31
|
|
; MIPS32R2-NEXT: jr $ra
|
|
; MIPS32R2-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS32R6-LABEL: bittest_63_i64:
|
|
; MIPS32R6: # %bb.0:
|
|
; MIPS32R6-NEXT: not $1, $4
|
|
; MIPS32R6-NEXT: srl $3, $1, 31
|
|
; MIPS32R6-NEXT: jr $ra
|
|
; MIPS32R6-NEXT: addiu $2, $zero, 0
|
|
;
|
|
; MIPS64-LABEL: bittest_63_i64:
|
|
; MIPS64: # %bb.0:
|
|
; MIPS64-NEXT: daddiu $1, $zero, -1
|
|
; MIPS64-NEXT: xor $1, $4, $1
|
|
; MIPS64-NEXT: jr $ra
|
|
; MIPS64-NEXT: dsrl $2, $1, 63
|
|
;
|
|
; MIPS64R2-LABEL: bittest_63_i64:
|
|
; MIPS64R2: # %bb.0:
|
|
; MIPS64R2-NEXT: daddiu $1, $zero, -1
|
|
; MIPS64R2-NEXT: xor $1, $4, $1
|
|
; MIPS64R2-NEXT: jr $ra
|
|
; MIPS64R2-NEXT: dsrl $2, $1, 63
|
|
;
|
|
; MIPS64R6-LABEL: bittest_63_i64:
|
|
; MIPS64R6: # %bb.0:
|
|
; MIPS64R6-NEXT: daddiu $1, $zero, -1
|
|
; MIPS64R6-NEXT: xor $1, $4, $1
|
|
; MIPS64R6-NEXT: jr $ra
|
|
; MIPS64R6-NEXT: dsrl $2, $1, 63
|
|
;
|
|
; MM32R3-LABEL: bittest_63_i64:
|
|
; MM32R3: # %bb.0:
|
|
; MM32R3-NEXT: not16 $2, $4
|
|
; MM32R3-NEXT: srl $3, $2, 31
|
|
; MM32R3-NEXT: li16 $2, 0
|
|
; MM32R3-NEXT: jrc $ra
|
|
;
|
|
; MM32R6-LABEL: bittest_63_i64:
|
|
; MM32R6: # %bb.0:
|
|
; MM32R6-NEXT: not16 $2, $4
|
|
; MM32R6-NEXT: srl $3, $2, 31
|
|
; MM32R6-NEXT: li16 $2, 0
|
|
; MM32R6-NEXT: jrc $ra
|
|
%shr = lshr i64 %a, 63
|
|
%not = xor i64 %shr, -1
|
|
%and = and i64 %not, 1
|
|
ret i64 %and
|
|
}
|