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llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc
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Nirav Dave 8603062ee4 Fix branch relaxation in 16-bit mode. 
Thread through MCSubtargetInfo to relaxInstruction function allowing relaxation
to generate jumps with 16-bit sized immediates in 16-bit mode.

This fixes PR22097.

Reviewers: dwmw2, tstellarAMD, craig.topper, jyknight

Subscribers: jfb, arsenm, jyknight, llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D20830

llvm-svn: 275068
 		2016-07-11 14:23:53 +00:00
..
CMakeLists.txt
…
HexagonAsmBackend.cpp Fix branch relaxation in 16-bit mode. 2016-07-11 14:23:53 +00:00
HexagonBaseInfo.h [Hexagon] Implement TLS support 2016-02-18 15:42:57 +00:00
HexagonELFObjectWriter.cpp [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding. 2016-02-16 20:38:17 +00:00
HexagonFixupKinds.h [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding. 2016-02-16 20:38:17 +00:00
HexagonInstPrinter.cpp Fix -Wunused-variable in non-Asserts build 2016-05-19 20:44:22 +00:00
HexagonInstPrinter.h
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HexagonMCAsmInfo.cpp [Hexagon] Few fixes for exception handling 2016-04-25 21:05:19 +00:00
HexagonMCAsmInfo.h [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
HexagonMCChecker.cpp [Hexagon] Separate C8 and USR to avoid unwanted subregister composition 2016-05-28 01:51:16 +00:00
HexagonMCChecker.h [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
HexagonMCCodeEmitter.cpp [Hexagon] Handle double-vector registers as new-value producers 2016-04-28 15:54:48 +00:00
HexagonMCCodeEmitter.h
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HexagonMCCompound.cpp
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HexagonMCDuplexInfo.cpp [Hexagon] Create global std::map lazily. 2016-07-02 13:05:12 +00:00
HexagonMCELFStreamer.cpp [Hexagon] Fix handling of lcomm directive 2016-04-20 15:54:13 +00:00
HexagonMCELFStreamer.h
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HexagonMCExpr.cpp [Hexagon] Missed member initialization causing ubsan failure. 2016-02-29 20:42:25 +00:00
HexagonMCExpr.h [Hexagon] Setting sign mismatch flag on expression instead of using bit tricks. 2016-02-29 19:17:56 +00:00
HexagonMCInstrInfo.cpp [Hexagon] Handle double-vector registers as new-value producers 2016-04-28 15:54:48 +00:00
HexagonMCInstrInfo.h [Hexagon] Handle double-vector registers as new-value producers 2016-04-28 15:54:48 +00:00
HexagonMCShuffler.cpp [scan-build] fix dead store warnings emitted on LLVM Hexagon code base 2016-05-13 13:13:59 +00:00
HexagonMCShuffler.h
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HexagonMCTargetDesc.cpp Delete MCCodeGenInfo. 2016-06-30 18:25:11 +00:00
HexagonMCTargetDesc.h
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HexagonShuffler.cpp
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HexagonShuffler.h
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LLVMBuild.txt
…