llvm-project/llvm/test/MC
Simon Dardis c8e33c5ca1 [mips] Remove codegen support for branch likely instructions.
This patch disables codegen support for branch likely instructions to
address a potential bug. These branches were unselectable as
they had the same patterns as the normal branches but came after them
when ISel was concerned.

The branch likely instructions were marked as having no delay
slots when they have annulling delay slots. The delay slot filler
does not currently handle annulling delay slot branches, so this
would lead to wrong codegen if these branches were generated.

Reviewers: atanasyan, nitesh.jain

Differential Revision: https://reviews.llvm.org/D38169

llvm-svn: 314421
2017-09-28 15:24:07 +00:00
..
AArch64 Re-land "Fix Bug 30978 by emitting cv file checksums." 2017-09-19 18:14:45 +00:00
AMDGPU AMDGPU: Fix encoding of op_sel for mad_mix* opcodes 2017-09-20 19:09:28 +00:00
ARM [ARM] Fix assembly and disassembly for VMRS/VMSR 2017-09-22 12:17:42 +00:00
AVR [AVR] Remove a bunch of now-obselete tests 2017-07-01 05:23:13 +00:00
AsmParser [AsmParser] Recommit: Hash is not a comment on some targets 2017-08-21 09:58:37 +00:00
BPF bpf: add new insns for bswap_to_le and negation 2017-09-28 02:46:11 +00:00
COFF [codeview] Change readobj symbol dumping format 2017-07-11 23:41:41 +00:00
Disassembler [ARM] Fix assembly and disassembly for VMRS/VMSR 2017-09-22 12:17:42 +00:00
ELF llvm-dwarfdump: Make -brief the default and add a -verbose option instead. 2017-09-11 23:05:20 +00:00
Hexagon [Hexagon] Handle a global operand to A2_addi when creating duplexes 2017-06-22 15:53:31 +00:00
Lanai [lanai] Add more tests for assembly of conditional ALU ops 2016-07-11 17:58:16 +00:00
MachO [dwarfdump] Add verbose output for .debug-line section 2017-09-21 20:15:30 +00:00
Markup
Mips [mips] Remove codegen support for branch likely instructions. 2017-09-28 15:24:07 +00:00
PowerPC [Power9] Add missing Power9 instructions. 2017-09-19 15:22:36 +00:00
RISCV [RISCV] Add common fixups and relocations 2017-09-28 08:26:24 +00:00
Sparc [Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed 2017-07-25 15:28:28 +00:00
SystemZ [SystemZ, AsmParser] Enable the mnemonic spell corrector. 2017-07-18 09:17:00 +00:00
WebAssembly [WebAssembly] Model weakly defined symbols as wasm exports 2017-09-26 21:10:09 +00:00
X86 [x86][AsmParser] Allow some more MS size directives 2017-09-28 11:04:08 +00:00