forked from OSchip/llvm-project
63 lines
1.6 KiB
LLVM
63 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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@a = external global i32
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@b = external global i32
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@c = external global i32
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define i32 @fn1(i32, i32) {
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; X86-LABEL: fn1:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: testl %eax, %eax
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; X86-NEXT: je .LBB0_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: .LBB0_2:
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; X86-NEXT: retl
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;
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; X64-LABEL: fn1:
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; X64: # %bb.0:
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; X64-NEXT: testl %esi, %esi
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; X64-NEXT: cmovel %esi, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%3 = icmp ne i32 %1, 0
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%4 = select i1 %3, i32 %0, i32 0
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ret i32 %4
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}
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define void @fn2() {
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; X86-LABEL: fn2:
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; X86: # %bb.0:
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; X86-NEXT: movl b, %eax
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; X86-NEXT: decl a
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; X86-NEXT: jne .LBB1_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: .LBB1_2:
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; X86-NEXT: movl %eax, c
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; X86-NEXT: retl
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;
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; X64-LABEL: fn2:
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; X64: # %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: decl {{.*}}(%rip)
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; X64-NEXT: je .LBB1_2
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; X64-NEXT: # %bb.1:
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; X64-NEXT: movl {{.*}}(%rip), %eax
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; X64-NEXT: .LBB1_2:
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; X64-NEXT: movl %eax, {{.*}}(%rip)
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; X64-NEXT: retq
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%1 = load volatile i32, i32* @b, align 4
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%2 = load i32, i32* @a, align 4
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%3 = add nsw i32 %2, -1
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store i32 %3, i32* @a, align 4
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%4 = icmp ne i32 %3, 0
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%5 = select i1 %4, i32 %1, i32 0
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store i32 %5, i32* @c, align 4
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ret void
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}
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