llvm-project/llvm/test/CodeGen/MIR
Mikael Holmen 42f7bc96dd [DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property
Summary:
In some cases, these operands lacked the IsDebug property, which is meant to signal that
they should not affect codegen. This patch adds a check for this property in the
MachineVerifier and adds it where it was missing.

This includes refactorings to use MachineInstrBuilder construction functions instead of
manually setting up the intrinsic everywhere.

Patch by: JesperAntonsson

Reviewers: aprantl, rnk, echristo, javed.absar

Reviewed By: aprantl

Subscribers: qcolombet, sdardis, nemanjai, JDevlieghere, atanasyan, llvm-commits

Differential Revision: https://reviews.llvm.org/D48319

llvm-svn: 335214
2018-06-21 10:03:34 +00:00
..
AArch64 [NFC] MIR-Canon: switching to a stable string sorting of instructions. 2018-05-13 06:07:20 +00:00
AMDGPU [MIR-Canon] Fixing a test failure caused by COPY Folding. 2018-04-16 09:31:49 +00:00
ARM Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Generic [MIRParser] Add parser support for 'true' and 'false' i1s. 2018-06-05 00:17:13 +00:00
Hexagon Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Mips Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
NVPTX [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. 2018-01-10 00:56:48 +00:00
PowerPC [if-converter] Handle BBs that terminate in ret during diamond conversion 2018-04-19 17:26:46 +00:00
WebAssembly [MIRParser][GlobalISel] Parsing vector pointer types (<M x pA>) 2018-05-08 02:02:50 +00:00
X86 [DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property 2018-06-21 10:03:34 +00:00
README Add README describing the intention of test/CodeGen/MIR 2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.