Dylan McKay d011869c82 [AVR] Set trackLivenessAfterRegAlloc ... This sets trackLivenessAfterRegAlloc on AVRRegisterInfo. Most existing targets set this flag. Without it, specific IR inputs cause LLVM to fail with: Assertion failed: (getParent()->getProperties().hasProperty( MachineFunctionProperties::Property::TracksLiveness) && "Liveness information is accurate"), function livein_begin file MachineBasicBlock.cpp, line 1354. With this commit, this no longer happens. Patch by Peter Nimmervoll. llvm-svn: 334409		2018-06-11 14:46:48 +00:00
..
atomics	[CodeGen] Unify MBB reference format in both MIR and debug output	2017-12-04 17:18:51 +00:00
calling-conv/c	[AVR] Save/restore the frame pointer for all functions	2017-05-02 01:57:48 +00:00
features	…
inline-asm	[AVR] Reserve the Y register in all functions	2017-05-03 11:56:01 +00:00
integration	…
intrinsics	…
pseudo	[AVR] Fix the testsuite after '%' changed to '$' in MIR	2018-02-08 09:17:11 +00:00
relax-mem	[AVR] Fix the testsuite after '%' changed to '$' in MIR	2018-02-08 09:17:11 +00:00
PR31344.ll	…
PR31345.ll	…
add.ll	…
alloca.ll	…
and.ll	…
branch-relaxation-long.ll	[AVR] Insert JMP for long branches	2017-10-04 09:51:28 +00:00
branch-relaxation.ll	[AVR] Fix a typo in the tests	2017-07-16 22:31:07 +00:00
brind.ll	[AVR] Reserve the Y register in all functions	2017-05-03 11:56:01 +00:00
call.ll	[AVR] Fix the build after setting alignment to 1 in r314179	2017-09-26 02:07:54 +00:00
clear-bss.ll	[AVR] Enable the '__do_copy_data' function	2017-09-11 10:32:51 +00:00
cmp.ll	…
com.ll	…
copy-data-to-ram.ll	[AVR] Enable the '__do_copy_data' function	2017-09-11 10:32:51 +00:00
ctlz.ll	[AVR] Use the generic branch relaxer	2017-07-11 04:17:13 +00:00
ctpop.ll	…
cttz.ll	[AVR] Use the generic branch relaxer	2017-07-11 04:17:13 +00:00
directmem.ll	[AVR] Fix the build after setting alignment to 1 in r314179	2017-09-26 02:07:54 +00:00
div.ll	[AVR] Lower i128 divisions to runtime library calls	2018-03-19 00:55:50 +00:00
dynalloca.ll	[AVR] Reserve the Y register in all functions	2017-05-03 11:56:01 +00:00
eor.ll	…
expand-integer-failure.ll	…
frame.ll	…
frmidx-iterator-bug.ll	[AVR] Fix bug which caused assertion errors for some FRMIDX instructions	2017-07-04 04:40:06 +00:00
high-pressure-on-ptrregs.ll	…
icall-func-pointer-correct-addr-space.ll	[AVR] Improve the 'icall-func-pointer-correct-addr-space.ll' test	2017-07-23 23:00:55 +00:00
impossible-reg-to-reg-copy.ll	…
interrupts.ll	[AVR] Use the short form of 'clr <reg>'	2017-11-24 15:36:43 +00:00
io.ll	…
issue-cannot-select-bswap.ll	…
issue-regalloc-stackframe-folding-earlyclobber.ll	[AVR] Remove the earlyclobber flag from LDDWRdYQ	2018-03-06 11:20:25 +00:00
large-return-size.ll	…
lit.local.cfg	…
load.ll	[AVR] Elaborate LDWRdPtr into `ld r, X++; ld r+1, X`	2017-10-04 10:33:36 +00:00
lower-formal-args-struct-return.ll	[AVR] Add a regression test for struct return lowering	2018-03-20 11:23:03 +00:00
lower-formal-arguments-assertion.ll	…
mul.ll	[AVR] Use the short form of 'clr <reg>'	2017-11-24 15:36:43 +00:00
neg.ll	…
no-print-operand-twice.ll	…
or.ll	…
progmem-extended.ll	…
progmem.ll	…
rem.ll	…
return.ll	[AVR] Fix two CodeGen tests	2017-12-09 07:51:43 +00:00
rot.ll	[AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi	2017-05-31 06:27:46 +00:00
runtime-trig.ll	…
rust-avr-bug-99.ll	[AVR] Set trackLivenessAfterRegAlloc	2018-06-11 14:46:48 +00:00
select-must-add-unconditional-jump.ll	[CodeGen] Unify the syntax of MBB successors in MIR and -debug output	2018-02-09 00:10:31 +00:00
sext.ll	…
shift.ll	…
sign-extension.ll	…
smul-with-overflow.ll	…
std-ldd-immediate-overflow.ll	Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)	2018-01-19 17:13:12 +00:00
store-undef.ll	…
store.ll	…
sub.ll	…
trunc.ll	…
umul-with-overflow.ll	…
unaligned-atomic-loads.ll	Relax unaligned access assertion when type is byte aligned	2017-12-09 06:45:36 +00:00
varargs.ll	[AVR] Fix the build after setting alignment to 1 in r314179	2017-09-26 02:07:54 +00:00
xor.ll	…
zext.ll	[AVR] Fix the test suite after r326500.	2018-03-05 20:56:25 +00:00