forked from OSchip/llvm-project
54 lines
1.7 KiB
LLVM
54 lines
1.7 KiB
LLVM
; RUN: llc -O0 -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
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; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-spill-sgpr-to-smem=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s
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; GCN-LABEL: {{^}}test_branch:
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; GCNNOOPT: v_writelane_b32
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; GCNNOOPT: v_writelane_b32
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; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]]
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; GCNNOOPT: v_readlane_b32
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; GCNNOOPT: v_readlane_b32
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; GCN: buffer_store_dword
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; GCNNOOPT: s_endpgm
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; GCN: {{^}}[[END]]:
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; GCN: s_endpgm
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define amdgpu_kernel void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) #0 {
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%cmp = icmp ne i32 %val, 0
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br i1 %cmp, label %store, label %end
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store:
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store i32 222, i32 addrspace(1)* %out
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ret void
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end:
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ret void
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}
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; GCN-LABEL: {{^}}test_brcc_i1:
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; GCN: s_load_dword [[VAL:s[0-9]+]]
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; GCNNOOPT: s_and_b32 s{{[0-9]+}}, 1, [[VAL]]
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; GCNOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], 1
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; GCN: s_cmp_eq_u32
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; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]]
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; GCN: buffer_store_dword
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; GCN: {{^}}[[END]]:
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; GCN: s_endpgm
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define amdgpu_kernel void @test_brcc_i1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i1 %val) #0 {
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%cmp0 = icmp ne i1 %val, 0
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br i1 %cmp0, label %store, label %end
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store:
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store i32 222, i32 addrspace(1)* %out
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ret void
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end:
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ret void
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}
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attributes #0 = { nounwind }
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