forked from OSchip/llvm-project
364 lines
6.6 KiB
LLVM
364 lines
6.6 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-eabi | FileCheck %s
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; Convert mul x, pow2 to shift.
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; Convert mul x, pow2 +/- 1 to shift + add/sub.
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; Convert mul x, (pow2 + 1) * pow2 to shift + add + shift.
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; Lowering other positive constants are not supported yet.
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define i32 @test2(i32 %x) {
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; CHECK-LABEL: test2
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; CHECK: lsl w0, w0, #1
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%mul = shl nsw i32 %x, 1
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ret i32 %mul
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}
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define i32 @test3(i32 %x) {
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; CHECK-LABEL: test3
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; CHECK: add w0, w0, w0, lsl #1
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%mul = mul nsw i32 %x, 3
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ret i32 %mul
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}
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define i32 @test4(i32 %x) {
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; CHECK-LABEL: test4
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; CHECK: lsl w0, w0, #2
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%mul = shl nsw i32 %x, 2
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ret i32 %mul
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}
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define i32 @test5(i32 %x) {
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; CHECK-LABEL: test5
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; CHECK: add w0, w0, w0, lsl #2
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%mul = mul nsw i32 %x, 5
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ret i32 %mul
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}
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define i32 @test6_32b(i32 %x) {
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; CHECK-LABEL: test6
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; CHECK: add {{w[0-9]+}}, w0, w0, lsl #1
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; CHECK: lsl w0, {{w[0-9]+}}, #1
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%mul = mul nsw i32 %x, 6
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ret i32 %mul
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}
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define i64 @test6_64b(i64 %x) {
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; CHECK-LABEL: test6_64b
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; CHECK: add {{x[0-9]+}}, x0, x0, lsl #1
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; CHECK: lsl x0, {{x[0-9]+}}, #1
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%mul = mul nsw i64 %x, 6
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ret i64 %mul
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}
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; mul that appears together with add, sub, s(z)ext is not supported to be
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; converted to the combination of lsl, add/sub yet.
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define i64 @test6_umull(i32 %x) {
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; CHECK-LABEL: test6_umull
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; CHECK: umull x0, w0, {{w[0-9]+}}
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%ext = zext i32 %x to i64
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%mul = mul nsw i64 %ext, 6
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ret i64 %mul
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}
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define i64 @test6_smull(i32 %x) {
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; CHECK-LABEL: test6_smull
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; CHECK: smull x0, w0, {{w[0-9]+}}
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%ext = sext i32 %x to i64
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%mul = mul nsw i64 %ext, 6
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ret i64 %mul
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}
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define i32 @test6_madd(i32 %x, i32 %y) {
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; CHECK-LABEL: test6_madd
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; CHECK: madd w0, w0, {{w[0-9]+}}, w1
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%mul = mul nsw i32 %x, 6
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%add = add i32 %mul, %y
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ret i32 %add
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}
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define i32 @test6_msub(i32 %x, i32 %y) {
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; CHECK-LABEL: test6_msub
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; CHECK: msub w0, w0, {{w[0-9]+}}, w1
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%mul = mul nsw i32 %x, 6
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%sub = sub i32 %y, %mul
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ret i32 %sub
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}
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define i64 @test6_umaddl(i32 %x, i64 %y) {
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; CHECK-LABEL: test6_umaddl
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; CHECK: umaddl x0, w0, {{w[0-9]+}}, x1
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%ext = zext i32 %x to i64
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%mul = mul nsw i64 %ext, 6
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%add = add i64 %mul, %y
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ret i64 %add
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}
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define i64 @test6_smaddl(i32 %x, i64 %y) {
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; CHECK-LABEL: test6_smaddl
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; CHECK: smaddl x0, w0, {{w[0-9]+}}, x1
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%ext = sext i32 %x to i64
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%mul = mul nsw i64 %ext, 6
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%add = add i64 %mul, %y
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ret i64 %add
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}
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define i64 @test6_umsubl(i32 %x, i64 %y) {
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; CHECK-LABEL: test6_umsubl
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; CHECK: umsubl x0, w0, {{w[0-9]+}}, x1
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%ext = zext i32 %x to i64
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%mul = mul nsw i64 %ext, 6
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%sub = sub i64 %y, %mul
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ret i64 %sub
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}
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define i64 @test6_smsubl(i32 %x, i64 %y) {
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; CHECK-LABEL: test6_smsubl
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; CHECK: smsubl x0, w0, {{w[0-9]+}}, x1
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%ext = sext i32 %x to i64
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%mul = mul nsw i64 %ext, 6
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%sub = sub i64 %y, %mul
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ret i64 %sub
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}
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define i64 @test6_umnegl(i32 %x) {
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; CHECK-LABEL: test6_umnegl
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; CHECK: umnegl x0, w0, {{w[0-9]+}}
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%ext = zext i32 %x to i64
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%mul = mul nsw i64 %ext, 6
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%sub = sub i64 0, %mul
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ret i64 %sub
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}
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define i64 @test6_smnegl(i32 %x) {
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; CHECK-LABEL: test6_smnegl
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; CHECK: smnegl x0, w0, {{w[0-9]+}}
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%ext = sext i32 %x to i64
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%mul = mul nsw i64 %ext, 6
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%sub = sub i64 0, %mul
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ret i64 %sub
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}
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define i32 @test7(i32 %x) {
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; CHECK-LABEL: test7
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; CHECK: lsl {{w[0-9]+}}, w0, #3
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; CHECK: sub w0, {{w[0-9]+}}, w0
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%mul = mul nsw i32 %x, 7
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ret i32 %mul
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}
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define i32 @test8(i32 %x) {
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; CHECK-LABEL: test8
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; CHECK: lsl w0, w0, #3
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%mul = shl nsw i32 %x, 3
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ret i32 %mul
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}
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define i32 @test9(i32 %x) {
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; CHECK-LABEL: test9
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; CHECK: add w0, w0, w0, lsl #3
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%mul = mul nsw i32 %x, 9
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ret i32 %mul
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}
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define i32 @test10(i32 %x) {
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; CHECK-LABEL: test10
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; CHECK: add {{w[0-9]+}}, w0, w0, lsl #2
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; CHECK: lsl w0, {{w[0-9]+}}, #1
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%mul = mul nsw i32 %x, 10
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ret i32 %mul
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}
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define i32 @test11(i32 %x) {
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; CHECK-LABEL: test11
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, 11
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ret i32 %mul
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}
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define i32 @test12(i32 %x) {
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; CHECK-LABEL: test12
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; CHECK: add {{w[0-9]+}}, w0, w0, lsl #1
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; CHECK: lsl w0, {{w[0-9]+}}, #2
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%mul = mul nsw i32 %x, 12
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ret i32 %mul
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}
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define i32 @test13(i32 %x) {
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; CHECK-LABEL: test13
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, 13
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ret i32 %mul
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}
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define i32 @test14(i32 %x) {
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; CHECK-LABEL: test14
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, 14
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ret i32 %mul
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}
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define i32 @test15(i32 %x) {
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; CHECK-LABEL: test15
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; CHECK: lsl {{w[0-9]+}}, w0, #4
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; CHECK: sub w0, {{w[0-9]+}}, w0
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%mul = mul nsw i32 %x, 15
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ret i32 %mul
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}
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define i32 @test16(i32 %x) {
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; CHECK-LABEL: test16
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; CHECK: lsl w0, w0, #4
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%mul = mul nsw i32 %x, 16
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ret i32 %mul
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}
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; Convert mul x, -pow2 to shift.
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; Convert mul x, -(pow2 +/- 1) to shift + add/sub.
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; Lowering other negative constants are not supported yet.
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define i32 @ntest2(i32 %x) {
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; CHECK-LABEL: ntest2
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; CHECK: neg w0, w0, lsl #1
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%mul = mul nsw i32 %x, -2
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ret i32 %mul
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}
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define i32 @ntest3(i32 %x) {
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; CHECK-LABEL: ntest3
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; CHECK: sub w0, w0, w0, lsl #2
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%mul = mul nsw i32 %x, -3
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ret i32 %mul
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}
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define i32 @ntest4(i32 %x) {
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; CHECK-LABEL: ntest4
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; CHECK:neg w0, w0, lsl #2
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%mul = mul nsw i32 %x, -4
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ret i32 %mul
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}
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define i32 @ntest5(i32 %x) {
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; CHECK-LABEL: ntest5
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; CHECK: add {{w[0-9]+}}, w0, w0, lsl #2
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; CHECK: neg w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, -5
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ret i32 %mul
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}
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define i32 @ntest6(i32 %x) {
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; CHECK-LABEL: ntest6
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, -6
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ret i32 %mul
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}
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define i32 @ntest7(i32 %x) {
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; CHECK-LABEL: ntest7
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; CHECK: sub w0, w0, w0, lsl #3
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%mul = mul nsw i32 %x, -7
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ret i32 %mul
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}
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define i32 @ntest8(i32 %x) {
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; CHECK-LABEL: ntest8
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; CHECK: neg w0, w0, lsl #3
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%mul = mul nsw i32 %x, -8
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ret i32 %mul
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}
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define i32 @ntest9(i32 %x) {
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; CHECK-LABEL: ntest9
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; CHECK: add {{w[0-9]+}}, w0, w0, lsl #3
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; CHECK: neg w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, -9
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ret i32 %mul
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}
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define i32 @ntest10(i32 %x) {
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; CHECK-LABEL: ntest10
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, -10
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ret i32 %mul
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}
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define i32 @ntest11(i32 %x) {
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; CHECK-LABEL: ntest11
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, -11
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ret i32 %mul
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}
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define i32 @ntest12(i32 %x) {
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; CHECK-LABEL: ntest12
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, -12
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ret i32 %mul
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}
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define i32 @ntest13(i32 %x) {
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; CHECK-LABEL: ntest13
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, -13
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ret i32 %mul
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}
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define i32 @ntest14(i32 %x) {
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; CHECK-LABEL: ntest14
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; CHECK: mul w0, w0, {{w[0-9]+}}
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%mul = mul nsw i32 %x, -14
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ret i32 %mul
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}
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define i32 @ntest15(i32 %x) {
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; CHECK-LABEL: ntest15
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; CHECK: sub w0, w0, w0, lsl #4
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%mul = mul nsw i32 %x, -15
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ret i32 %mul
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}
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define i32 @ntest16(i32 %x) {
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; CHECK-LABEL: ntest16
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; CHECK: neg w0, w0, lsl #4
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%mul = mul nsw i32 %x, -16
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ret i32 %mul
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}
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