forked from OSchip/llvm-project
115 lines
4.7 KiB
LLVM
115 lines
4.7 KiB
LLVM
; RUN: opt %loadPolly -polly-scops -polly-invariant-load-hoisting=true -analyze < %s | FileCheck %s
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;
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; Check that we do not consolidate the invariant loads to smp[order - 1] and
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; smp[order - 2] in the blocks %0 and %16. While they have the same pointer
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; operand (SCEV) they do not have the same access relation due to the
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; instantiation of "order" from their domain.
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;
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; CHECK: Invariant Accesses: {
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [order, n] -> { Stmt_bb1[] -> MemRef_smp[1] };
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; CHECK-NEXT: Execution Context: [order, n] -> { : order = 2 }
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [order, n] -> { Stmt_bb1[] -> MemRef_smp[0] };
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; CHECK-NEXT: Execution Context: [order, n] -> { : order = 2 }
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [order, n] -> { Stmt_bb16[] -> MemRef_smp[2] };
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; CHECK-NEXT: Execution Context: [order, n] -> { : order = 3 }
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [order, n] -> { Stmt_bb16[] -> MemRef_smp[1] };
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; CHECK-NEXT: Execution Context: [order, n] -> { : order = 3 }
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; CHECK-NEXT: }
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;
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; ModuleID = '/home/johannes/Downloads/test_case.ll'
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; Function Attrs: nounwind uwtable
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define void @encode_residual_fixed(i32* %res, i32* %smp, i32 %n, i32 %order) {
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bb:
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br label %.split
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.split: ; preds = %bb
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switch i32 %order, label %bb32 [
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i32 2, label %bb1
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i32 3, label %bb16
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]
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bb1: ; preds = %.split
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%tmp = add nsw i32 %order, -1
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%tmp2 = sext i32 %tmp to i64
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%tmp3 = getelementptr inbounds i32, i32* %smp, i64 %tmp2
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%tmp4 = load i32, i32* %tmp3, align 4
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%tmp5 = add nsw i32 %order, -2
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%tmp6 = sext i32 %tmp5 to i64
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%tmp7 = getelementptr inbounds i32, i32* %smp, i64 %tmp6
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%tmp8 = load i32, i32* %tmp7, align 4
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%tmp9 = sub nsw i32 %tmp4, %tmp8
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%tmp10 = icmp slt i32 %order, %n
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br i1 %tmp10, label %.lr.ph, label %.loopexit
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.lr.ph: ; preds = %bb1
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%tmp11 = sext i32 %order to i64
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br label %bb12
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bb12: ; preds = %bb12, %.lr.ph
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%indvars.iv = phi i64 [ %tmp11, %.lr.ph ], [ %indvars.iv.next, %bb12 ]
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%i.03 = phi i32 [ %order, %.lr.ph ], [ %tmp14, %bb12 ]
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%tmp13 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv
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store i32 %tmp9, i32* %tmp13, align 4
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%tmp14 = add nsw i32 %i.03, 2
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%tmp15 = icmp slt i32 %tmp14, %n
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%indvars.iv.next = add nsw i64 %indvars.iv, 2
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br i1 %tmp15, label %bb12, label %..loopexit_crit_edge
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bb16: ; preds = %.split
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%tmp17 = add nsw i32 %order, -1
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%tmp18 = sext i32 %tmp17 to i64
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%tmp19 = getelementptr inbounds i32, i32* %smp, i64 %tmp18
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%tmp20 = load i32, i32* %tmp19, align 4
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%tmp21 = add nsw i32 %order, -2
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%tmp22 = sext i32 %tmp21 to i64
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%tmp23 = getelementptr inbounds i32, i32* %smp, i64 %tmp22
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%tmp24 = load i32, i32* %tmp23, align 4
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%tmp25 = sub nsw i32 %tmp20, %tmp24
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%tmp26 = icmp slt i32 %order, %n
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br i1 %tmp26, label %.lr.ph5, label %.loopexit2
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.lr.ph5: ; preds = %bb16
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%tmp27 = sext i32 %order to i64
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br label %bb28
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bb28: ; preds = %bb28, %.lr.ph5
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%indvars.iv6 = phi i64 [ %tmp27, %.lr.ph5 ], [ %indvars.iv.next7, %bb28 ]
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%i.14 = phi i32 [ %order, %.lr.ph5 ], [ %tmp30, %bb28 ]
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%tmp29 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv6
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store i32 %tmp25, i32* %tmp29, align 4
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%tmp30 = add nsw i32 %i.14, 2
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%tmp31 = icmp slt i32 %tmp30, %n
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%indvars.iv.next7 = add nsw i64 %indvars.iv6, 2
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br i1 %tmp31, label %bb28, label %..loopexit2_crit_edge
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..loopexit_crit_edge: ; preds = %bb12
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br label %.loopexit
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.loopexit: ; preds = %..loopexit_crit_edge, %bb1
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br label %bb32
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..loopexit2_crit_edge: ; preds = %bb28
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br label %.loopexit2
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.loopexit2: ; preds = %..loopexit2_crit_edge, %bb16
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br label %bb32
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bb32: ; preds = %.loopexit2, %.loopexit, %.split
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%tmp33 = getelementptr inbounds i32, i32* %res, i64 2
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%tmp34 = load i32, i32* %tmp33, align 4
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%tmp35 = icmp eq i32 %tmp34, 5
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br i1 %tmp35, label %bb37, label %bb36
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bb36: ; preds = %bb32
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ret void
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bb37: ; preds = %bb32
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ret void
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}
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