forked from OSchip/llvm-project
86 lines
3.9 KiB
LLVM
86 lines
3.9 KiB
LLVM
; RUN: opt %loadPolly -polly-vectorizer=polly -polly-opt-isl -polly-codegen -S < %s | FileCheck %s
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;
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; Polly crashed during codegen with an assertion error while trying to generate
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; a pointer bitcast from a pointer having an address space to one without
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;
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; CHECK-LABEL: entry:
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; CHECK: load <4 x float>, <4 x float> addrspace(4)*
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;
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; ModuleID = '/tmp/lud.bc'
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source_filename = "lud.c"
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; This datalayout was for a 32-bit ARC processor with 512-bit vector extension
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target datalayout = "e-m:e-p:32:32-p1:32:32-p3:32:32-p5:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-v256:32-v512:32-n8:16:32"
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; Specify x86 because the ARC backend is still experimental and not built by default
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target triple = "x86_64-unknown-unknown"
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; Function Attrs: noinline nounwind
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define void @LU_decomp_kij_opt(i32 %n, i32 %lda, float addrspace(4)* %A, float addrspace(4)* %scratch) #0 {
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entry:
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%cmp34 = icmp sgt i32 %n, 0
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br i1 %cmp34, label %for.body.lr.ph, label %for.end34
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for.body.lr.ph: ; preds = %entry
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%0 = add nsw i32 %n, -1
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br label %for.body
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for.body: ; preds = %for.inc32, %for.body.lr.ph
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%k.035 = phi i32 [ 0, %for.body.lr.ph ], [ %add2, %for.inc32 ]
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%mul = mul nsw i32 %k.035, %lda
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%add = add nsw i32 %mul, %k.035
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%arrayidx = getelementptr inbounds float, float addrspace(4)* %A, i32 %add
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%1 = load float, float addrspace(4)* %arrayidx, align 4
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%conv1 = fdiv arcp float 1.000000e+00, %1
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%add2 = add nuw nsw i32 %k.035, 1
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%exitcond37 = icmp eq i32 %k.035, %0
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br i1 %exitcond37, label %for.end34, label %for.body6.lr.ph
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for.body6.lr.ph: ; preds = %for.body
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br label %for.body6
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for.body6: ; preds = %for.inc29, %for.body6.lr.ph
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%i.033 = phi i32 [ %add2, %for.body6.lr.ph ], [ %inc30, %for.inc29 ]
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%mul7 = mul nsw i32 %i.033, %lda
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%add8 = add nsw i32 %mul7, %k.035
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%arrayidx9 = getelementptr inbounds float, float addrspace(4)* %A, i32 %add8
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%2 = load float, float addrspace(4)* %arrayidx9, align 4
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%mul10 = fmul arcp contract float %conv1, %2
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store float %mul10, float addrspace(4)* %arrayidx9, align 4
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br label %for.body18
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for.body18: ; preds = %for.body18, %for.body6
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%j.031 = phi i32 [ %add2, %for.body6 ], [ %inc, %for.body18 ]
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%3 = load float, float addrspace(4)* %arrayidx9, align 4
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%add23 = add nsw i32 %j.031, %mul
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%arrayidx24 = getelementptr inbounds float, float addrspace(4)* %A, i32 %add23
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%4 = load float, float addrspace(4)* %arrayidx24, align 4
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%mul25 = fmul arcp contract float %3, %4
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%add27 = add nsw i32 %j.031, %mul7
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%arrayidx28 = getelementptr inbounds float, float addrspace(4)* %A, i32 %add27
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%5 = load float, float addrspace(4)* %arrayidx28, align 4
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%sub = fsub arcp contract float %5, %mul25
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store float %sub, float addrspace(4)* %arrayidx28, align 4
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%inc = add nuw nsw i32 %j.031, 1
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%exitcond = icmp eq i32 %inc, %n
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br i1 %exitcond, label %for.inc29, label %for.body18
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for.inc29: ; preds = %for.body18
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%inc30 = add nuw nsw i32 %i.033, 1
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%exitcond36 = icmp eq i32 %inc30, %n
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br i1 %exitcond36, label %for.inc32, label %for.body6
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for.inc32: ; preds = %for.inc29
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br label %for.body
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for.end34: ; preds = %for.body, %entry
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ret void
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}
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attributes #0 = { noinline nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" }
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!llvm.module.flags = !{!0, !1}
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!llvm.ident = !{!2}
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!0 = !{i32 1, !"ArcIntrinsicCheck", i32 18224056}
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!1 = !{i32 1, !"wchar_size", i32 2}
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!2 = !{!"clang version 10.0.1 "}
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