.. |
GC
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Make shell redirection construct portable
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2017-07-12 13:24:46 +00:00 |
GlobalISel
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Add an ID field to StackObjects
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2017-07-20 21:03:45 +00:00 |
3addr-16bit.ll
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…
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3addr-or.ll
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…
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3dnow-intrinsics.ll
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…
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4char-promote.ll
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…
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2003-08-03-CallArgLiveRanges.ll
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…
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2003-08-23-DeadBlockTest.ll
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…
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2003-11-03-GlobalBool.ll
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FileCheck-ize some tests in test/CodeGen/X86/
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2017-02-17 00:29:59 +00:00 |
2004-02-13-FrameReturnAddress.ll
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FileCheck-ize some tests in test/CodeGen/X86/
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2017-02-17 00:29:59 +00:00 |
2004-02-14-InefficientStackPointer.ll
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FileCheck-ize some tests in test/CodeGen/X86/
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2017-02-17 00:29:59 +00:00 |
2004-02-22-Casts.ll
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…
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2004-03-30-Select-Max.ll
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…
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2004-04-13-FPCMOV-Crash.ll
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…
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2004-06-10-StackifierCrash.ll
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…
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2004-10-08-SelectSetCCFold.ll
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…
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2005-01-17-CycleInDAG.ll
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FileCheck-ize some tests in test/CodeGen/X86/
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2017-02-17 00:29:59 +00:00 |
2005-02-14-IllegalAssembler.ll
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FileCheck-ize some tests in test/CodeGen/X86/
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2017-02-17 00:29:59 +00:00 |
2005-05-08-FPStackifierPHI.ll
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…
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2006-01-19-ISelFoldingBug.ll
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[x86] Give this test a triple so that we don't have to cope with two
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2017-02-17 01:18:38 +00:00 |
2006-03-01-InstrSchedBug.ll
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[X86] Clean up test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
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2017-03-20 20:10:30 +00:00 |
2006-03-02-InstrSchedBug.ll
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[X86] Clean up test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
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2017-02-26 01:32:35 +00:00 |
2006-04-04-CrossBlockCrash.ll
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…
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2006-04-27-ISelFoldingBug.ll
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…
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2006-05-01-SchedCausingSpills.ll
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…
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2006-05-02-InstrSched1.ll
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…
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2006-05-02-InstrSched2.ll
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…
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2006-05-08-CoalesceSubRegClass.ll
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…
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2006-05-08-InstrSched.ll
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…
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2006-05-11-InstrSched.ll
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Revert r304824 "Fix PR23384 (part 3 of 3)"
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2017-06-19 17:57:15 +00:00 |
2006-05-17-VectorArg.ll
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…
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-20-InlineAsm.ll
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…
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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…
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2006-07-31-SingleRegClass.ll
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…
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2006-08-07-CycleInDAG.ll
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…
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2006-08-16-CycleInDAG.ll
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…
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2006-08-21-ExtraMovInst.ll
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…
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2006-09-01-CycleInDAG.ll
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…
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2006-10-02-BoolRetCrash.ll
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…
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2006-10-09-CycleInDAG.ll
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…
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2006-10-10-FindModifiedNodeSlotBug.ll
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…
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2006-10-12-CycleInDAG.ll
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…
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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…
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2006-11-17-IllegalMove.ll
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…
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2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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…
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2006-12-19-IntelSyntax.ll
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…
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2007-01-08-InstrSched.ll
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Add LiveRangeShrink pass to shrink live range within BB.
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2017-05-31 23:25:25 +00:00 |
2007-01-08-X86-64-Pointer.ll
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…
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2007-01-13-StackPtrIndex.ll
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…
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2007-01-29-InlineAsm-ir.ll
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…
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2007-02-04-OrAddrMode.ll
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…
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2007-02-16-BranchFold.ll
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…
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2007-02-19-LiveIntervalAssert.ll
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…
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2007-02-23-DAGCombine-Miscompile.ll
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…
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2007-02-25-FastCCStack.ll
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…
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2007-03-01-SpillerCrash.ll
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…
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2007-03-15-GEP-Idx-Sink.ll
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Turn on -addr-sink-using-gep by default.
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2017-04-06 22:42:18 +00:00 |
2007-03-16-InlineAsm.ll
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…
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2007-03-18-LiveIntervalAssert.ll
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…
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2007-03-24-InlineAsmMultiRegConstraint.ll
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…
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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…
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
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…
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2007-04-17-LiveIntervalAssert.ll
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…
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2007-04-24-Huge-Stack.ll
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…
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2007-04-24-VectorCrash.ll
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…
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2007-04-27-InlineAsm-IntMemInput.ll
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…
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2007-05-05-Personality.ll
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…
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2007-05-05-VecCastExpand.ll
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…
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2007-05-14-LiveIntervalAssert.ll
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…
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2007-05-15-maskmovq.ll
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…
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2007-05-17-ShuffleISelBug.ll
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…
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2007-06-04-X86-64-CtorAsmBugs.ll
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…
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2007-06-28-X86-64-isel.ll
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…
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2007-06-29-DAGCombinerBug.ll
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…
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2007-06-29-VecFPConstantCSEBug.ll
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…
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2007-07-03-GR64ToVR64.ll
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…
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2007-07-10-StackerAssert.ll
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…
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2007-07-18-Vector-Extract.ll
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…
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2007-08-01-LiveVariablesBug.ll
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…
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2007-08-09-IllegalX86-64Asm.ll
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…
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2007-08-10-SignExtSubreg.ll
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…
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2007-09-05-InvalidAsm.ll
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…
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2007-09-06-ExtWeakAliasee.ll
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…
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2007-09-27-LDIntrinsics.ll
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…
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2007-10-04-AvoidEFLAGSCopy.ll
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2007-10-12-CoalesceExtSubReg.ll
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…
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2007-10-12-SpillerUnfold1.ll
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2007-10-12-SpillerUnfold2.ll
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…
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2007-10-14-CoalescerCrash.ll
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…
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2007-10-15-CoalescerCrash.ll
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…
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2007-10-16-CoalescerCrash.ll
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…
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2007-10-19-SpillerUnfold.ll
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…
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2007-10-28-inlineasm-q-modifier.ll
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…
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2007-10-29-ExtendSetCC.ll
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…
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2007-10-30-LSRCrash.ll
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…
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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…
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2007-11-03-x86-64-q-constraint.ll
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…
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2007-11-04-LiveIntervalCrash.ll
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…
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2007-11-04-LiveVariablesBug.ll
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…
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2007-11-04-rip-immediate-constant.ll
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…
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2007-11-06-InstrSched.ll
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…
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2007-11-07-MulBy4.ll
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…
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2007-11-30-LoadFolding-Bug.ll
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…
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2007-12-16-BURRSchedCrash.ll
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…
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2007-12-18-LoadCSEBug.ll
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…
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2008-01-08-IllegalCMP.ll
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…
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2008-01-08-SchedulerCrash.ll
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[X86] X86::CMOV to Branch heuristic based optimization.
|
2017-07-16 17:39:56 +00:00 |
2008-01-09-LongDoubleSin.ll
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…
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2008-01-16-FPStackifierAssert.ll
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…
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2008-01-16-InvalidDAGCombineXform.ll
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…
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2008-02-05-ISelCrash.ll
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…
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2008-02-06-LoadFoldingBug.ll
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…
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2008-02-14-BitMiscompile.ll
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Update various test's codegen. NFC
|
2017-02-25 16:46:47 +00:00 |
2008-02-18-TailMergingBug.ll
|
…
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2008-02-20-InlineAsmClobber.ll
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…
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2008-02-22-LocalRegAllocBug.ll
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…
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2008-02-25-InlineAsmBug.ll
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…
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2008-02-25-X86-64-CoalescerBug.ll
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…
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2008-02-26-AsmDirectMemOp.ll
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…
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2008-02-27-DeadSlotElimBug.ll
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…
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2008-02-27-PEICrash.ll
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…
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2008-03-06-frem-fpstack.ll
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…
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2008-03-07-APIntBug.ll
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…
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2008-03-10-RegAllocInfLoop.ll
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…
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2008-03-12-ThreadLocalAlias.ll
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…
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2008-03-13-TwoAddrPassCrash.ll
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…
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2008-03-14-SpillerCrash.ll
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…
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2008-03-19-DAGCombinerBug.ll
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…
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2008-03-23-DarwinAsmComments.ll
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…
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2008-03-25-TwoAddrPassBug.ll
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…
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2008-03-31-SpillerFoldingBug.ll
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…
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2008-04-02-unnamedEH.ll
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…
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2008-04-08-CoalescerCrash.ll
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…
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2008-04-09-BranchFolding.ll
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…
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2008-04-15-LiveVariableBug.ll
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…
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2008-04-16-CoalescerBug.ll
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…
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2008-04-16-ReMatBug.ll
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…
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2008-04-17-CoalescerBug.ll
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…
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2008-04-24-MemCpyBug.ll
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…
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2008-04-24-pblendw-fold-crash.ll
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…
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2008-04-26-Asm-Optimize-Imm.ll
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…
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2008-04-28-CoalescerBug.ll
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…
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2008-04-28-CyclicSchedUnit.ll
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…
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2008-05-01-InvalidOrdCompare.ll
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…
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2008-05-09-PHIElimBug.ll
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…
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2008-05-09-ShuffleLoweringBug.ll
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…
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2008-05-12-tailmerge-5.ll
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…
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2008-05-21-CoalescerBug.ll
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…
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2008-05-22-FoldUnalignedLoad.ll
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…
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2008-05-28-CoalescerBug.ll
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…
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2008-05-28-LocalRegAllocBug.ll
|
…
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2008-06-13-NotVolatileLoadStore.ll
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…
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2008-06-13-VolatileLoadStore.ll
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…
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2008-06-16-SubregsBug.ll
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…
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2008-06-25-VecISelBug.ll
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…
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2008-07-07-DanglingDeadInsts.ll
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…
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2008-07-09-ELFSectionAttributes.ll
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…
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2008-07-11-SHLBy1.ll
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…
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2008-07-16-CoalescerCrash.ll
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…
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2008-07-19-movups-spills.ll
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…
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2008-07-22-CombinerCrash.ll
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…
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2008-07-23-VSetCC.ll
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…
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2008-08-06-CmpStride.ll
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…
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2008-08-06-RewriterBug.ll
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…
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2008-08-17-UComiCodeGenBug.ll
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…
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2008-08-23-64Bit-maskmovq.ll
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…
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2008-08-31-EH_RETURN32.ll
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…
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2008-08-31-EH_RETURN64.ll
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…
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2008-09-05-sinttofp-2xi32.ll
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…
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2008-09-09-LinearScanBug.ll
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…
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2008-09-11-CoalescerBug.ll
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…
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2008-09-11-CoalescerBug2.ll
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…
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2008-09-17-inline-asm-1.ll
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…
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2008-09-18-inline-asm-2.ll
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…
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2008-09-19-RegAllocBug.ll
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…
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2008-09-25-sseregparm-1.ll
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…
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2008-09-26-FrameAddrBug.ll
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…
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2008-09-29-ReMatBug.ll
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…
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2008-09-29-VolatileBug.ll
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…
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2008-10-06-x87ld-nan-1.ll
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…
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2008-10-06-x87ld-nan-2.ll
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…
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2008-10-07-SSEISelBug.ll
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…
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2008-10-11-CallCrash.ll
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…
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2008-10-13-CoalescerBug.ll
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…
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2008-10-16-VecUnaryOp.ll
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…
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2008-10-17-Asm64bitRConstraint.ll
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…
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2008-10-20-AsmDoubleInI32.ll
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…
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2008-10-24-FlippedCompare.ll
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…
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2008-10-27-CoalescerBug.ll
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…
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2008-10-29-ExpandVAARG.ll
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…
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2008-11-03-F80VAARG.ll
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…
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2008-11-06-testb.ll
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…
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2008-11-13-inlineasm-3.ll
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…
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2008-11-29-ULT-Sign.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
2008-12-01-SpillerAssert.ll
|
…
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2008-12-01-loop-iv-used-outside-loop.ll
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…
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2008-12-02-IllegalResultType.ll
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…
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2008-12-02-dagcombine-1.ll
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…
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2008-12-02-dagcombine-2.ll
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…
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2008-12-02-dagcombine-3.ll
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…
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2008-12-16-dagcombine-4.ll
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…
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2008-12-19-EarlyClobberBug.ll
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…
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2008-12-22-dagcombine-5.ll
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…
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2008-12-23-crazy-address.ll
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…
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2008-12-23-dagcombine-6.ll
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…
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2009-01-13-DoubleUpdate.ll
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…
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2009-01-16-SchedulerBug.ll
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…
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2009-01-16-UIntToFP.ll
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…
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2009-01-18-ConstantExprCrash.ll
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…
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2009-01-25-NoSSE.ll
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…
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2009-01-26-WrongCheck.ll
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…
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2009-01-27-NullStrings.ll
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…
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2009-01-31-BigShift.ll
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…
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2009-01-31-BigShift2.ll
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…
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2009-01-31-BigShift3.ll
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…
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2009-02-01-LargeMask.ll
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…
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2009-02-03-AnalyzedTwice.ll
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…
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2009-02-04-sext-i64-gep.ll
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…
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2009-02-08-CoalescerBug.ll
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…
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2009-02-09-ivs-different-sizes.ll
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…
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2009-02-11-codegenprepare-reuse.ll
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…
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2009-02-12-DebugInfoVLA.ll
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…
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2009-02-12-InlineAsm-nieZ-constraints.ll
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…
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2009-02-12-SpillerBug.ll
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…
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2009-02-21-ExtWeakInitializer.ll
|
…
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2009-02-25-CommuteBug.ll
|
…
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2009-02-26-MachineLICMBug.ll
|
CodeGen: Rename DEBUG_TYPE to match passnames
|
2017-05-25 21:26:32 +00:00 |
2009-03-03-BTHang.ll
|
…
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2009-03-03-BitcastLongDouble.ll
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…
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2009-03-05-burr-list-crash.ll
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…
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2009-03-07-FPConstSelect.ll
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…
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2009-03-09-APIntCrash.ll
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…
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2009-03-09-SpillerBug.ll
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…
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2009-03-10-CoalescerBug.ll
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…
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2009-03-12-CPAlignBug.ll
|
…
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2009-03-13-PHIElimBug.ll
|
…
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2009-03-16-PHIElimInLPad.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
2009-03-23-LinearScanBug.ll
|
…
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2009-03-23-MultiUseSched.ll
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…
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2009-03-23-i80-fp80.ll
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…
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2009-03-25-TestBug.ll
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…
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2009-03-26-NoImplicitFPBug.ll
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…
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2009-04-12-FastIselOverflowCrash.ll
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…
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2009-04-12-picrel.ll
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…
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2009-04-13-2AddrAssert-2.ll
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…
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2009-04-13-2AddrAssert.ll
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…
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2009-04-14-IllegalRegs.ll
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…
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2009-04-16-SpillerUnfold.ll
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…
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2009-04-24.ll
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…
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2009-04-25-CoalescerBug.ll
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…
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2009-04-27-CoalescerAssert.ll
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…
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2009-04-27-LiveIntervalsAssert.ll
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…
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2009-04-27-LiveIntervalsAssert2.ll
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…
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2009-04-29-IndirectDestOperands.ll
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…
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2009-04-29-LinearScanBug.ll
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…
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2009-04-29-RegAllocAssert.ll
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…
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2009-04-scale.ll
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…
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2009-05-08-InlineAsmIOffset.ll
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…
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2009-05-11-tailmerge-crash.ll
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…
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2009-05-19-SingleElementExtractElement.ll
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…
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2009-05-23-available_externally.ll
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…
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2009-05-23-dagcombine-shifts.ll
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…
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2009-05-28-DAGCombineCrash.ll
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…
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2009-05-30-ISelBug.ll
|
…
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2009-06-02-RewriterBug.ll
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…
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2009-06-03-Win64DisableRedZone.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
2009-06-03-Win64SpillXMM.ll
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…
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2009-06-04-VirtualLiveIn.ll
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…
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2009-06-05-VZextByteShort.ll
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…
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2009-06-05-VariableIndexInsert.ll
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…
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2009-06-05-sitofpCrash.ll
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…
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2009-06-06-ConcatVectors.ll
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…
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
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…
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2009-06-15-not-a-tail-call.ll
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…
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2009-06-18-movlp-shuffle-register.ll
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…
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2009-07-06-TwoAddrAssert.ll
|
…
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2009-07-07-SplitICmp.ll
|
…
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2009-07-09-ExtractBoolFromVector.ll
|
…
|
|
2009-07-15-CoalescerBug.ll
|
…
|
|
2009-07-16-CoalescerBug.ll
|
…
|
|
2009-07-19-AsmExtraOperands.ll
|
…
|
|
2009-07-20-CoalescerBug.ll
|
…
|
|
2009-07-20-DAGCombineBug.ll
|
…
|
|
2009-08-06-branchfolder-crash.ll
|
…
|
|
2009-08-06-inlineasm.ll
|
…
|
|
2009-08-08-CastError.ll
|
…
|
|
2009-08-12-badswitch.ll
|
…
|
|
2009-08-14-Win64MemoryIndirectArg.ll
|
…
|
|
2009-08-19-LoadNarrowingMiscompile.ll
|
…
|
|
2009-08-23-SubRegReuseUndo.ll
|
…
|
|
2009-09-10-LoadFoldingBug.ll
|
…
|
|
2009-09-10-SpillComments.ll
|
…
|
|
2009-09-16-CoalescerBug.ll
|
…
|
|
2009-09-19-earlyclobber.ll
|
…
|
|
2009-09-21-NoSpillLoopCount.ll
|
…
|
|
2009-09-22-CoalescerBug.ll
|
…
|
|
2009-09-23-LiveVariablesBug.ll
|
…
|
|
2009-10-14-LiveVariablesBug.ll
|
…
|
|
2009-10-16-Scope.ll
|
…
|
|
2009-10-19-EmergencySpill.ll
|
…
|
|
2009-10-19-atomic-cmp-eflags.ll
|
…
|
|
2009-10-25-RewriterBug.ll
|
…
|
|
2009-11-04-SubregCoalescingBug.ll
|
…
|
|
2009-11-13-VirtRegRewriterBug.ll
|
…
|
|
2009-11-16-MachineLICM.ll
|
…
|
|
2009-11-16-UnfoldMemOpBug.ll
|
…
|
|
2009-11-17-UpdateTerminator.ll
|
…
|
|
2009-11-18-TwoAddrKill.ll
|
…
|
|
2009-11-25-ImpDefBug.ll
|
…
|
|
2009-12-01-EarlyClobberBug.ll
|
…
|
|
2009-12-11-TLSNoRedZone.ll
|
…
|
|
2010-01-05-ZExt-Shl.ll
|
…
|
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2010-01-07-ISelBug.ll
|
…
|
|
2010-01-08-Atomic64Bug.ll
|
…
|
|
2010-01-11-ExtraPHIArg.ll
|
…
|
|
2010-01-13-OptExtBug.ll
|
…
|
|
2010-01-15-SelectionDAGCycle.ll
|
…
|
|
2010-01-18-DbgValue.ll
|
Re-land "Use the frame index side table for byval and inalloca arguments"
|
2017-05-09 16:02:20 +00:00 |
2010-01-19-OptExtBug.ll
|
…
|
|
2010-02-01-DbgValueCrash.ll
|
…
|
|
2010-02-01-TaillCallCrash.ll
|
…
|
|
2010-02-03-DualUndef.ll
|
…
|
|
2010-02-04-SchedulerBug.ll
|
…
|
|
2010-02-11-NonTemporal.ll
|
…
|
|
2010-02-12-CoalescerBug-Impdef.ll
|
…
|
|
2010-02-15-ImplicitDefBug.ll
|
…
|
|
2010-02-19-TailCallRetAddrBug.ll
|
…
|
|
2010-02-23-DAGCombineBug.ll
|
…
|
|
2010-02-23-DIV8rDefinesAX.ll
|
…
|
|
2010-02-23-RematImplicitSubreg.ll
|
…
|
|
2010-02-23-SingleDefPhiJoin.ll
|
…
|
|
2010-03-04-Mul8Bug.ll
|
…
|
|
2010-03-05-ConstantFoldCFG.ll
|
…
|
|
2010-03-05-EFLAGS-Redef.ll
|
…
|
|
2010-03-17-ISelBug.ll
|
…
|
|
2010-04-06-SSEDomainFixCrash.ll
|
…
|
|
2010-04-08-CoalescerBug.ll
|
…
|
|
2010-04-13-AnalyzeBranchCrash.ll
|
…
|
|
2010-04-21-CoalescerBug.ll
|
…
|
|
2010-04-29-CoalescerCrash.ll
|
…
|
|
2010-04-30-LocalAlloc-LandingPad.ll
|
Elide argument copies during instruction selection
|
2017-03-01 21:42:00 +00:00 |
2010-05-03-CoalescerSubRegClobber.ll
|
…
|
|
2010-05-05-LocalAllocEarlyClobber.ll
|
…
|
|
2010-05-06-LocalInlineAsmClobber.ll
|
…
|
|
2010-05-07-ldconvert.ll
|
…
|
|
2010-05-10-DAGCombinerBug.ll
|
…
|
|
2010-05-12-FastAllocKills.ll
|
…
|
|
2010-05-16-nosseconversion.ll
|
…
|
|
2010-05-25-DotDebugLoc.ll
|
…
|
|
2010-05-26-DotDebugLoc.ll
|
…
|
|
2010-05-26-FP_TO_INT-crash.ll
|
…
|
|
2010-05-28-Crash.ll
|
…
|
|
2010-06-01-DeadArg-DbgInfo.ll
|
…
|
|
2010-06-09-FastAllocRegisters.ll
|
…
|
|
2010-06-14-fast-isel-fs-load.ll
|
…
|
|
2010-06-15-FastAllocEarlyCLobber.ll
|
…
|
|
2010-06-24-g-constraint-crash.ll
|
…
|
|
2010-06-25-CoalescerSubRegDefDead.ll
|
…
|
|
2010-06-25-asm-RA-crash.ll
|
…
|
|
2010-06-28-FastAllocTiedOperand.ll
|
…
|
|
2010-06-28-matched-g-constraint.ll
|
…
|
|
2010-07-02-UnfoldBug.ll
|
…
|
|
2010-07-02-asm-alignstack.ll
|
…
|
|
2010-07-06-DbgCrash.ll
|
…
|
|
2010-07-06-asm-RIP.ll
|
…
|
|
2010-07-11-FPStackLoneUse.ll
|
…
|
|
2010-07-13-indirectXconstraint.ll
|
…
|
|
2010-07-15-Crash.ll
|
…
|
|
2010-07-29-SetccSimplify.ll
|
…
|
|
2010-08-04-MaskedSignedCompare.ll
|
[DAGCombiner] fold binops with constant into select-of-constants
|
2017-03-01 22:51:31 +00:00 |
2010-08-04-MingWCrash.ll
|
…
|
|
2010-08-04-StackVariable.ll
|
…
|
|
2010-09-01-RemoveCopyByCommutingDef.ll
|
…
|
|
2010-09-16-EmptyFilename.ll
|
…
|
|
2010-09-16-asmcrash.ll
|
…
|
|
2010-09-17-SideEffectsInChain.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
2010-09-30-CMOV-JumpTable-PHI.ll
|
…
|
|
2010-10-08-cmpxchg8b.ll
|
…
|
|
2010-11-02-DbgParameter.ll
|
…
|
|
2010-11-09-MOVLPS.ll
|
…
|
|
2010-11-18-SelectOfExtload.ll
|
…
|
|
2011-01-07-LegalizeTypesCrash.ll
|
…
|
|
2011-01-10-DagCombineHang.ll
|
…
|
|
2011-01-24-DbgValue-Before-Use.ll
|
…
|
|
2011-02-04-FastRegallocNoFP.ll
|
…
|
|
2011-02-12-shuffle.ll
|
…
|
|
2011-02-21-VirtRegRewriter-KillSubReg.ll
|
…
|
|
2011-02-23-UnfoldBug.ll
|
…
|
|
2011-02-27-Fpextend.ll
|
…
|
|
2011-03-02-DAGCombiner.ll
|
…
|
|
2011-03-08-Sched-crash.ll
|
…
|
|
2011-03-09-Physreg-Coalescing.ll
|
…
|
|
2011-03-30-CreateFixedObjCrash.ll
|
…
|
|
2011-04-13-SchedCmpJmp.ll
|
…
|
|
2011-04-19-sclr-bb.ll
|
…
|
|
2011-05-09-loaduse.ll
|
…
|
|
2011-05-26-UnreachableBlockElim.ll
|
…
|
|
2011-05-27-CrossClassCoalescing.ll
|
…
|
|
2011-06-01-fildll.ll
|
…
|
|
2011-06-03-x87chain.ll
|
…
|
|
2011-06-06-fgetsign80bit.ll
|
…
|
|
2011-06-12-FastAllocSpill.ll
|
…
|
|
2011-06-14-PreschedRegalias.ll
|
…
|
|
2011-06-14-mmx-inlineasm.ll
|
…
|
|
2011-06-19-QuicksortCoalescerBug.ll
|
…
|
|
2011-07-13-BadFrameIndexDisplacement.ll
|
…
|
|
2011-08-23-PerformSubCombine128.ll
|
…
|
|
2011-08-23-Trampoline.ll
|
…
|
|
2011-08-29-BlockConstant.ll
|
…
|
|
2011-08-29-InitOrder.ll
|
…
|
|
2011-09-14-valcoalesce.ll
|
…
|
|
2011-09-18-sse2cmp.ll
|
…
|
|
2011-09-21-setcc-bug.ll
|
…
|
|
2011-10-11-SpillDead.ll
|
…
|
|
2011-10-11-srl.ll
|
…
|
|
2011-10-12-MachineCSE.ll
|
…
|
|
2011-10-18-FastISel-VectorParams.ll
|
…
|
|
2011-10-19-LegelizeLoad.ll
|
…
|
|
2011-10-19-widen_vselect.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
2011-10-21-widen-cmp.ll
|
[SelectionDAG] Optimize VSELECT->SETCC of incompatible or illegal types.
|
2017-03-16 07:17:12 +00:00 |
2011-10-27-tstore.ll
|
…
|
|
2011-10-30-padd.ll
|
…
|
|
2011-11-07-LegalizeBuildVector.ll
|
…
|
|
2011-11-22-AVX2-Domains.ll
|
…
|
|
2011-11-30-or.ll
|
[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.
|
2017-02-05 18:33:24 +00:00 |
2011-12-06-AVXVectorExtractCombine.ll
|
…
|
|
2011-12-06-BitcastVectorGlobal.ll
|
…
|
|
2011-12-08-AVXISelBugs.ll
|
…
|
|
2011-12-8-bitcastintprom.ll
|
[X86][SSE] Attempt to extract vector elements through target shuffles
|
2017-02-27 21:01:57 +00:00 |
2011-12-15-vec_shift.ll
|
[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.
|
2017-02-05 18:33:24 +00:00 |
2011-12-26-extractelement-duplicate-load.ll
|
…
|
|
2011-12-28-vselecti8.ll
|
…
|
|
2011-20-21-zext-ui2fp.ll
|
…
|
|
2012-01-10-UndefExceptionEdge.ll
|
…
|
|
2012-1-10-buildvector.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
2012-01-11-split-cv.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:05:43 +00:00 |
2012-01-12-extract-sv.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
2012-01-16-mfence-nosse-flags.ll
|
…
|
|
2012-01-18-vbitcast.ll
|
…
|
|
2012-02-12-dagco.ll
|
…
|
|
2012-02-14-scalar.ll
|
…
|
|
2012-02-23-mmx-inlineasm.ll
|
…
|
|
2012-02-29-CoalescerBug.ll
|
…
|
|
2012-03-15-build_vector_wl.ll
|
…
|
|
2012-03-20-LargeConstantExpr.ll
|
…
|
|
2012-03-26-PostRALICMBug.ll
|
…
|
|
2012-04-09-TwoAddrPassBug.ll
|
…
|
|
2012-04-26-sdglue.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
2012-05-17-TwoAddressBug.ll
|
…
|
|
2012-05-19-CoalescerCrash.ll
|
…
|
|
2012-07-10-extload64.ll
|
[X86] Regenerate i64 ext-load on 32-bit target tests
|
2017-02-15 14:06:17 +00:00 |
2012-07-10-shufnorm.ll
|
…
|
|
2012-07-15-BuildVectorPromote.ll
|
…
|
|
2012-07-15-broadcastfold.ll
|
…
|
|
2012-07-15-tconst_shl.ll
|
…
|
|
2012-07-15-vshl.ll
|
…
|
|
2012-07-16-LeaUndef.ll
|
…
|
|
2012-07-16-fp2ui-i1.ll
|
…
|
|
2012-07-17-vtrunc.ll
|
…
|
|
2012-07-23-select_cc.ll
|
…
|
|
2012-08-07-CmpISelBug.ll
|
…
|
|
2012-08-16-setcc.ll
|
[x86] fix over-specified triple and auto-generate checks; NFC
|
2017-07-06 14:15:15 +00:00 |
2012-08-17-legalizer-crash.ll
|
…
|
|
2012-08-28-UnsafeMathCrash.ll
|
…
|
|
2012-09-13-dagco-fneg.ll
|
…
|
|
2012-09-28-CGPBug.ll
|
…
|
|
2012-10-02-DAGCycle.ll
|
…
|
|
2012-10-03-DAGCycle.ll
|
…
|
|
2012-10-18-crash-dagco.ll
|
…
|
|
2012-11-28-merge-store-alias.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
2012-12-1-merge-multiple.ll
|
…
|
|
2012-12-12-DAGCombineCrash.ll
|
…
|
|
2012-12-14-v8fp80-crash.ll
|
…
|
|
2012-12-19-NoImplicitFloat.ll
|
…
|
|
2013-01-09-DAGCombineBug.ll
|
…
|
|
2013-03-13-VEX-DestReg.ll
|
…
|
|
2013-05-06-ConactVectorCrash.ll
|
…
|
|
2013-10-14-FastISel-incorrect-vreg.ll
|
…
|
|
2014-05-29-factorial.ll
|
…
|
|
2014-08-29-CompactUnwind.ll
|
[SCEV] createAddRecFromPHI: Optimize for the most common case.
|
2017-05-03 23:53:38 +00:00 |
9601.ll
|
…
|
|
20090313-signext.ll
|
…
|
|
AppendingLinkage.ll
|
…
|
|
Atomics-64.ll
|
…
|
|
DbgValueOtherTargets.test
|
…
|
|
DynamicCalleeSavedRegisters.ll
|
[llvm] Remove redundant check-prefix=CHECK from tests. NFC.
|
2017-07-17 17:32:45 +00:00 |
MachineBranchProb.ll
|
…
|
|
MachineSink-CritEdge.ll
|
…
|
|
MachineSink-DbgValue.ll
|
…
|
|
MachineSink-PHIUse.ll
|
…
|
|
MachineSink-SubReg.ll
|
…
|
|
MachineSink-eflags.ll
|
…
|
|
MergeConsecutiveStores.ll
|
Add bitcast store-merge test.
|
2017-06-23 20:52:14 +00:00 |
O0-pipeline.ll
|
[PEI] Add basic opt-remarks support
|
2017-07-19 23:47:32 +00:00 |
StackColoring-dbg.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
StackColoring.ll
|
StackColoring: smarter check for slot overlap
|
2017-06-12 14:56:02 +00:00 |
SwitchLowering.ll
|
…
|
|
SwizzleShuff.ll
|
…
|
|
TruncAssertZext.ll
|
…
|
|
WidenArith.ll
|
…
|
|
abi-isel.ll
|
…
|
|
absolute-bit-mask.ll
|
…
|
|
absolute-bt.ll
|
…
|
|
absolute-cmp.ll
|
X86: Introduce relocImm-based patterns for cmp.
|
2017-02-09 22:02:28 +00:00 |
absolute-constant.ll
|
…
|
|
absolute-rotate.ll
|
X86: Produce @ABS8 symbol modifiers for absolute symbols in range [0,128).
|
2017-02-02 00:32:03 +00:00 |
add-ext.ll
|
…
|
|
add-of-carry.ll
|
[DAGCombine] (add/uaddo X, Carry) -> (addcarry X, 0, Carry)
|
2017-06-01 10:42:39 +00:00 |
add-sub-nsw-nuw.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:05:43 +00:00 |
add.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
add32ri8.ll
|
…
|
|
add_shl_constant.ll
|
…
|
|
addcarry.ll
|
[DAGCombine] Make sure we check the ResNo from UADDO before combining
|
2017-06-11 11:36:38 +00:00 |
addr-label-difference.ll
|
…
|
|
addr-mode-matcher.ll
|
…
|
|
addr-of-ret-addr.ll
|
…
|
|
address-type-promotion-constantexpr.ll
|
…
|
|
adx-intrinsics.ll
|
…
|
|
aes_intrinsics.ll
|
[X86] Add an AVX command line and regenerate AES intrinsics test using the update_llc_test_checks.py
|
2017-02-21 07:32:14 +00:00 |
alias-gep.ll
|
…
|
|
alias-static-alloca.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
aliases.ll
|
…
|
|
aligned-comm.ll
|
…
|
|
aligned-variadic.ll
|
…
|
|
alignment-2.ll
|
…
|
|
alignment.ll
|
…
|
|
all-ones-vector.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
alldiv-divdi3.ll
|
…
|
|
alloca-align-rounding-32.ll
|
…
|
|
alloca-align-rounding.ll
|
…
|
|
allrem-moddi3.ll
|
…
|
|
and-encoding.ll
|
…
|
|
and-load-fold.ll
|
…
|
|
and-or-fold.ll
|
…
|
|
and-sink.ll
|
Regenerate and-sink.ll test results. NFC
|
2017-06-02 14:02:46 +00:00 |
and-su.ll
|
…
|
|
andimm8.ll
|
…
|
|
anyext.ll
|
…
|
|
anyregcc-crash.ll
|
…
|
|
anyregcc.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
apm.ll
|
…
|
|
arg-cast.ll
|
…
|
|
arg-copy-elide.ll
|
Elide stores which are overwritten without being observed.
|
2017-05-16 19:43:56 +00:00 |
asm-block-labels.ll
|
…
|
|
asm-global-imm.ll
|
…
|
|
asm-indirect-mem.ll
|
…
|
|
asm-invalid-register-class-crasher.ll
|
…
|
|
asm-label.ll
|
…
|
|
asm-label2.ll
|
…
|
|
asm-mismatched-types.ll
|
…
|
|
asm-modifier-P.ll
|
…
|
|
asm-modifier.ll
|
…
|
|
asm-reg-type-mismatch.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
asm-reject-reg-type-mismatch.ll
|
…
|
|
atom-call-reg-indirect-foldedreload32.ll
|
…
|
|
atom-call-reg-indirect-foldedreload64.ll
|
…
|
|
atom-call-reg-indirect.ll
|
[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
|
2017-06-29 10:00:33 +00:00 |
atom-cmpb.ll
|
…
|
|
atom-fixup-lea1.ll
|
…
|
|
atom-fixup-lea2.ll
|
[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
|
2017-06-29 10:00:33 +00:00 |
atom-fixup-lea3.ll
|
Revert r304824 "Fix PR23384 (part 3 of 3)"
|
2017-06-19 17:57:15 +00:00 |
atom-fixup-lea4.ll
|
…
|
|
atom-lea-addw-bug.ll
|
…
|
|
atom-lea-sp.ll
|
…
|
|
atom-pad-short-functions.ll
|
…
|
|
atom-sched.ll
|
[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
|
2017-06-29 10:00:33 +00:00 |
atom-shuf.ll
|
…
|
|
atomic-dagsched.ll
|
…
|
|
atomic-eflags-reuse.ll
|
Revert r291640 change to fold X86 comparison with atomic_load_add.
|
2017-01-17 19:18:57 +00:00 |
atomic-flags.ll
|
…
|
|
atomic-load-store-wide.ll
|
…
|
|
atomic-load-store.ll
|
…
|
|
atomic-minmax-i6432.ll
|
[X86] X86::CMOV to Branch heuristic based optimization.
|
2017-07-16 17:39:56 +00:00 |
atomic-non-integer.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
atomic-ops-ancient-64.ll
|
…
|
|
atomic-or.ll
|
…
|
|
atomic-pointer.ll
|
…
|
|
atomic8.ll
|
…
|
|
atomic16.ll
|
…
|
|
atomic32.ll
|
…
|
|
atomic64.ll
|
…
|
|
atomic128.ll
|
[X86] X86::CMOV to Branch heuristic based optimization.
|
2017-07-16 17:39:56 +00:00 |
atomic6432.ll
|
…
|
|
atomic_add.ll
|
…
|
|
atomic_idempotent.ll
|
…
|
|
atomic_mi.ll
|
…
|
|
atomic_op.ll
|
…
|
|
attribute-sections.ll
|
…
|
|
avg.ll
|
[X86] Add comment string for broadcast loads from the constant pool.
|
2017-07-04 05:46:11 +00:00 |
avoid-lea-scale2.ll
|
…
|
|
avoid-loop-align-2.ll
|
…
|
|
avoid-loop-align.ll
|
…
|
|
avoid_complex_am.ll
|
…
|
|
avx-arith.ll
|
…
|
|
avx-basic.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-bitcast.ll
|
…
|
|
avx-brcond.ll
|
…
|
|
avx-cast.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-cmp.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 15:04:05 +00:00 |
avx-cvt-2.ll
|
…
|
|
avx-cvt-3.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-cvt.ll
|
[X86][AVX] Disable VCVTSS2SD & VCVTSD2SS memory folding and fix the register class of their first input when creating node in fast-isel.
|
2017-02-23 13:15:44 +00:00 |
avx-fp2int.ll
|
…
|
|
avx-insertelt.ll
|
…
|
|
avx-intel-ocl.ll
|
…
|
|
avx-intrinsics-fast-isel.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-intrinsics-x86-upgrade.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-intrinsics-x86.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-intrinsics-x86_64.ll
|
[X86][AVX] Regenerated and cleaned up AVX1 intrinsic tests.
|
2017-07-26 10:54:51 +00:00 |
avx-isa-check.ll
|
[X86][AVX-512] Allow EVEX encoded instruction selection when available for mul v8i32.
|
2017-05-04 07:34:58 +00:00 |
avx-load-store.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-logic.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-minmax.ll
|
…
|
|
avx-schedule.ll
|
Added cost of ZEROALL and ZEROUPPER instrs in btver2 cpu.
|
2017-07-27 13:12:08 +00:00 |
avx-select.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-shift.ll
|
…
|
|
avx-shuffle-x86_32.ll
|
[X86][SSE] Enable post-legalize vXi64 shuffle combining on 32-bit targets
|
2017-03-04 12:50:47 +00:00 |
avx-splat.ll
|
[x86] fix over-specific triple; NFC
|
2017-06-06 00:18:11 +00:00 |
avx-trunc.ll
|
[X86 Codegen] Fixed a bug in unsigned saturation
|
2017-01-29 13:18:30 +00:00 |
avx-unpack.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 15:04:05 +00:00 |
avx-varargs-x86_64.ll
|
…
|
|
avx-vbroadcast.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
avx-vbroadcastf128.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-vextractf128.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-vinsertf128.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 15:04:05 +00:00 |
avx-vperm2x128.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx-vzeroupper.ll
|
[x86] auto-generate better checks; NFC
|
2017-05-28 13:57:59 +00:00 |
avx-win64-args.ll
|
…
|
|
avx-win64.ll
|
…
|
|
avx.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx1-logical-load-folding.ll
|
[X86][AVX1] Regenerate checks and add i686 triple tests for folded logical ops
|
2017-05-04 13:00:30 +00:00 |
avx2-arith.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx2-cmp.ll
|
[X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics tests
|
2017-06-28 10:54:54 +00:00 |
avx2-conversions.ll
|
[X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics tests
|
2017-06-28 10:54:54 +00:00 |
avx2-fma-fneg-combine.ll
|
[X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics tests
|
2017-06-28 10:54:54 +00:00 |
avx2-gather.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx2-intrinsics-fast-isel.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx2-intrinsics-x86-upgrade.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
avx2-intrinsics-x86.ll
|
Reverting commit 306414 on behalf of @gadi.haber
|
2017-06-28 11:23:31 +00:00 |
avx2-logic.ll
|
[X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics tests
|
2017-06-28 10:54:54 +00:00 |
avx2-nontemporal.ll
|
…
|
|
avx2-phaddsub.ll
|
[X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics tests
|
2017-06-28 10:54:54 +00:00 |
avx2-pmovxrm.ll
|
…
|
|
avx2-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
avx2-shift.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx2-vbroadcast.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx2-vbroadcasti128.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx2-vector-shifts.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx2-vperm.ll
|
[X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics tests
|
2017-06-28 10:54:54 +00:00 |
avx512-adc-sbb.ll
|
[x86] avoid adc/sbb assert when both sides of add are zexted (PR32316)
|
2017-03-17 17:27:31 +00:00 |
avx512-any_extend_load.ll
|
[X86] Generate VZEROUPPER for Skylake-avx512.
|
2017-03-03 09:03:24 +00:00 |
avx512-arith.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx512-bugfix-23634.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512-bugfix-25270.ll
|
…
|
|
avx512-bugfix-26264.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512-build-vector.ll
|
…
|
|
avx512-calling-conv.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
avx512-cmp-kor-sequence.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512-cmp.ll
|
[X86] Rerun "update_llc_test_checks" tool on CodeGen tests. NFC.
|
2017-07-02 12:01:33 +00:00 |
avx512-cvt.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx512-ext.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx512-extract-subvector.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
avx512-fma-intrinsics.ll
|
…
|
|
avx512-fma.ll
|
…
|
|
avx512-fsel.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
avx512-gather-scatter-intrin.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512-i1test.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
avx512-inc-dec.ll
|
…
|
|
avx512-insert-extract.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx512-insert-extract_i1.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
avx512-intel-ocl.ll
|
…
|
|
avx512-intrinsics-fast-isel.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx512-intrinsics-upgrade.ll
|
Reverting commit 306414 on behalf of @gadi.haber
|
2017-06-28 11:23:31 +00:00 |
avx512-intrinsics.ll
|
[AVX-512] Remove and autoupgrade the masked integer compare intrinsics
|
2017-06-22 20:11:01 +00:00 |
avx512-load-store.ll
|
[X86][AVX512] Add masked MOVS[S|D] patterns
|
2017-07-31 08:26:14 +00:00 |
avx512-logic.ll
|
x86] adjust test constants to maintain coverage; NFC
|
2017-06-18 14:45:23 +00:00 |
avx512-mask-op.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx512-mask-spills.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512-mask-zext-bugfix.ll
|
…
|
|
avx512-masked-memop-64-32.ll
|
[X86] Generate VZEROUPPER for Skylake-avx512.
|
2017-03-03 09:03:24 +00:00 |
avx512-masked_memop-16-8.ll
|
[X86] Generate VZEROUPPER for Skylake-avx512.
|
2017-03-03 09:03:24 +00:00 |
avx512-memfold.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
avx512-mov.ll
|
[X86][AVX512] Add missing entries to EVEX2VEX tables
|
2017-03-07 08:05:53 +00:00 |
avx512-nontemporal.ll
|
…
|
|
avx512-pmovxrm.ll
|
[SelectionDAG] Teach getNode to simplify a couple easy cases of EXTRACT_SUBVECTOR
|
2017-01-24 02:36:59 +00:00 |
avx512-regcall-Mask.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
avx512-regcall-NoMask.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
avx512-rotate.ll
|
[X86][AVX512] Improve vector rotation constant folding tests
|
2017-07-20 13:07:37 +00:00 |
avx512-round.ll
|
[X86][AVX-512] Don't raise inexact in ceil, floor, round, trunc.
|
2017-06-26 16:00:24 +00:00 |
avx512-scalar.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-scalarIntrinsics.ll
|
…
|
|
avx512-scalar_mask.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
avx512-select.ll
|
[X86][AVX512] Add masked MOVS[S|D] patterns
|
2017-07-31 08:26:14 +00:00 |
avx512-shift.ll
|
[X86][AVX512] Regenerate shift tests
|
2017-07-17 09:53:45 +00:00 |
avx512-skx-insert-subvec.ll
|
[X86] Generate VZEROUPPER for Skylake-avx512.
|
2017-03-03 09:03:24 +00:00 |
avx512-trunc.ll
|
[X86] Generate VZEROUPPER for Skylake-avx512.
|
2017-03-03 09:03:24 +00:00 |
avx512-unsafe-fp-math.ll
|
…
|
|
avx512-vbroadcast.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
avx512-vbroadcasti128.ll
|
[X86][AVX512] Add missing entries to EVEX2VEX tables
|
2017-03-07 08:05:53 +00:00 |
avx512-vbroadcasti256.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-vec-cmp.ll
|
[X86] Rerun "update_llc_test_checks" tool on CodeGen tests. NFC.
|
2017-07-02 12:01:33 +00:00 |
avx512-vec3-crash.ll
|
AVX-512: Fixed a crash during legalization of <3 x i8> type
|
2017-06-25 13:36:20 +00:00 |
avx512-vpermv3-commute.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
avx512-vpternlog-commute.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
avx512-vselect-crash.ll
|
[X86] Regenerate test.
|
2017-07-25 16:10:32 +00:00 |
avx512-vselect.ll
|
[x86] Fix a failure to select with AVX-512 when the type legalizer
|
2017-05-11 10:52:16 +00:00 |
avx512bw-arith.ll
|
…
|
|
avx512bw-intrinsics-fast-isel.ll
|
…
|
|
avx512bw-intrinsics-upgrade.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
avx512bw-intrinsics.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
avx512bw-mask-op.ll
|
[AVX-512] Support ADD/SUB/MUL of mask vectors
|
2017-01-19 07:12:35 +00:00 |
avx512bw-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512bw-vec-cmp.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512bwvl-arith.ll
|
…
|
|
avx512bwvl-intrinsics-fast-isel.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
avx512bwvl-intrinsics-upgrade.ll
|
Reverting commit 306414 on behalf of @gadi.haber
|
2017-06-28 11:23:31 +00:00 |
avx512bwvl-intrinsics.ll
|
[AVX-512] Remove and autoupgrade the masked integer compare intrinsics
|
2017-06-22 20:11:01 +00:00 |
avx512bwvl-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512bwvl-vec-cmp.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512cd-intrinsics-upgrade.ll
|
[AVX-512] Remove lzcnt intrinsics and autoupgrade them to generic ctlz intrinsics with select.
|
2017-02-24 05:35:04 +00:00 |
avx512cd-intrinsics.ll
|
[AVX-512] Remove lzcnt intrinsics and autoupgrade them to generic ctlz intrinsics with select.
|
2017-02-24 05:35:04 +00:00 |
avx512cdvl-intrinsics-upgrade.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512cdvl-intrinsics.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512dq-intrinsics-upgrade.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512dq-intrinsics.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512dq-mask-op.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
avx512dqvl-intrinsics-upgrade.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512dqvl-intrinsics.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512er-intrinsics.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
avx512ifma-intrinsics.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512ifmavl-intrinsics.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
avx512vbmi-intrinsics.ll
|
…
|
|
avx512vbmivl-intrinsics.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
avx512vl-arith.ll
|
[x86] adjust test constants to maintain coverage; NFC
|
2017-06-18 14:23:47 +00:00 |
avx512vl-intrinsics-fast-isel.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
avx512vl-intrinsics-upgrade.ll
|
Recommitting rL305465 after fixing bug in TableGen in rL306251 & rL306371
|
2017-06-27 12:08:37 +00:00 |
avx512vl-intrinsics.ll
|
[AVX-512] Remove and autoupgrade the masked integer compare intrinsics
|
2017-06-22 20:11:01 +00:00 |
avx512vl-logic.ll
|
x86] adjust test constants to maintain coverage; NFC
|
2017-06-18 14:45:23 +00:00 |
avx512vl-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512vl-nontemporal.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-vbroadcast.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
avx512vl-vec-cmp.ll
|
[X86][AVX512] Regenerate AVX512VL comparison tests.
|
2017-07-09 15:47:43 +00:00 |
avx512vl-vec-masked-cmp.ll
|
[X86][AVX512] Add patterns for masked AVX512 floating point compare instructions that were missing.
|
2017-07-24 08:10:32 +00:00 |
avx512vpopcntdq-intrinsics.ll
|
[X86] Adding vpopcntd and vpopcntq instructions
|
2017-05-25 13:45:23 +00:00 |
barrier-sse.ll
|
…
|
|
barrier.ll
|
…
|
|
base-pointer-and-cmpxchg.ll
|
…
|
|
basic-promote-integers.ll
|
…
|
|
bc-extract.ll
|
[X86][SSE] Regenerate extracted bitcasted constant tests and add 32-bit test target
|
2017-02-20 15:57:14 +00:00 |
bigstructret.ll
|
…
|
|
bigstructret2.ll
|
…
|
|
bit-piece-comment.ll
|
…
|
|
bit-test-shift.ll
|
…
|
|
bitcast-and-setcc-128.ll
|
[X86][SSE] Dropped -mcpu from bitcast+setcc mask tests
|
2017-07-05 17:30:30 +00:00 |
bitcast-and-setcc-256.ll
|
[X86][SSE] Add pre-AVX2 support for (i32 bitcast(v32i1)) -> 2xMOVMSK
|
2017-07-21 09:58:50 +00:00 |
bitcast-and-setcc-512.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
bitcast-i256.ll
|
[X86][AVX] Regenerate i256 bitcasted store test
|
2017-06-23 18:34:56 +00:00 |
bitcast-int-to-vector-bool-sext.ll
|
[X86][SSE] Tests for bitcasting iX integers to vXi1 boolean vectors
|
2017-07-06 19:33:10 +00:00 |
bitcast-int-to-vector-bool-zext.ll
|
[X86][SSE] Tests for bitcasting iX integers to vXi1 boolean vectors
|
2017-07-06 19:33:10 +00:00 |
bitcast-int-to-vector-bool.ll
|
[X86][SSE] Tests for bitcasting iX integers to vXi1 boolean vectors
|
2017-07-06 19:33:10 +00:00 |
bitcast-int-to-vector.ll
|
…
|
|
bitcast-mmx.ll
|
[X86][MMX] Fix folding of shift value loads to cover whole 64-bits
|
2017-03-13 21:23:29 +00:00 |
bitcast-setcc-128.ll
|
[X86][SSE] Dropped -mcpu from bitcast+setcc tests
|
2017-07-06 18:27:34 +00:00 |
bitcast-setcc-256.ll
|
[X86][SSE] Add pre-AVX2 support for (i32 bitcast(v32i1)) -> 2xMOVMSK
|
2017-07-21 09:58:50 +00:00 |
bitcast-setcc-512.ll
|
[X86][SSE] Add pre-AVX2 support for (i32 bitcast(v32i1)) -> 2xMOVMSK
|
2017-07-21 09:58:50 +00:00 |
bitcast.ll
|
…
|
|
bitcast2.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
bitreverse.ll
|
[X86] Add extra BITREVERSE tests
|
2017-03-14 14:03:16 +00:00 |
block-placement.ll
|
Revert Revert [MBP] do not rotate loop if it creates extra branch
|
2017-07-11 08:34:58 +00:00 |
block-placement.mir
|
[ImplicitNullCheck] Extend Implicit Null Check scope by using stores
|
2017-02-07 19:19:49 +00:00 |
bmi-intrinsics-fast-isel-x86_64.ll
|
…
|
|
bmi-intrinsics-fast-isel.ll
|
…
|
|
bmi-schedule.ll
|
This patch returns proper value to indicate the case when instruction throughput can't be calculated.
|
2017-07-26 18:55:14 +00:00 |
bmi.ll
|
[X86] Add pattern to use bzhi for 64-bit 'and' with a mask when there is a load involved.
|
2017-07-31 05:55:54 +00:00 |
bmi2-schedule.ll
|
This patch returns proper value to indicate the case when instruction throughput can't be calculated.
|
2017-07-26 18:55:14 +00:00 |
bool-ext-inc.ll
|
[X86][AVX] Regenerate tests with constant broadcast comments
|
2017-07-16 11:43:16 +00:00 |
bool-simplify.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 15:27:19 +00:00 |
bool-zext.ll
|
…
|
|
br-fold.ll
|
…
|
|
branchfolding-catchpads.ll
|
…
|
|
branchfolding-debugloc.ll
|
[BranchFolding] Update debug location along with the update of branch instruction.
|
2017-02-21 00:12:38 +00:00 |
branchfolding-landingpads.ll
|
…
|
|
branchfolding-undef.mir
|
MIParser/MIRPrinter: Compute block successors if not explicitely specified
|
2017-05-05 21:09:30 +00:00 |
brcond.ll
|
[x86] add/consolidate tests for setcc+setcc+and/or; NFC
|
2017-03-31 17:55:07 +00:00 |
break-anti-dependencies.ll
|
…
|
|
break-false-dep.ll
|
[ExecutionDepsFix] Improve clearance calculation for loops
|
2017-01-30 23:37:03 +00:00 |
broadcast-elm-cross-splat-vec.ll
|
[X86] Add comment string for broadcast loads from the constant pool.
|
2017-07-04 05:46:11 +00:00 |
bss_pagealigned.ll
|
…
|
|
bswap-inline-asm.ll
|
…
|
|
bswap-rotate.ll
|
[DAGCombiner] Fix issue with rotate combines asserting if the constant value types differ from the result type.
|
2017-07-13 10:41:49 +00:00 |
bswap-vector.ll
|
[X86][SSE] Dropped -mcpu from vector bswap tests
|
2017-06-28 13:59:15 +00:00 |
bswap-wide-int.ll
|
Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset
|
2017-07-05 01:21:23 +00:00 |
bswap.ll
|
…
|
|
bswap_tree.ll
|
[DAGCombiner] Improve MatchBswapHword logic (PR31357)
|
2017-05-02 10:16:19 +00:00 |
bswap_tree2.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
bt.ll
|
[SelectionDAG][X86] CombineBT - more aggressively determine demanded bits
|
2017-07-29 14:50:25 +00:00 |
btq.ll
|
[X86] Regenerated BT tests
|
2017-07-26 12:49:20 +00:00 |
build-vector-128.ll
|
Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset
|
2017-07-05 01:21:23 +00:00 |
build-vector-256.ll
|
Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset
|
2017-07-05 01:21:23 +00:00 |
build-vector-512.ll
|
Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset
|
2017-07-05 01:21:23 +00:00 |
buildvec-insertvec.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
bypass-slow-division-32.ll
|
Codegen: Make chains from trellis-shaped CFGs
|
2017-02-15 19:49:14 +00:00 |
bypass-slow-division-64.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
bypass-slow-division-tune.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
byval-align.ll
|
…
|
|
byval-callee-cleanup.ll
|
…
|
|
byval.ll
|
…
|
|
byval2.ll
|
…
|
|
byval3.ll
|
…
|
|
byval4.ll
|
…
|
|
byval5.ll
|
…
|
|
byval6.ll
|
…
|
|
byval7.ll
|
…
|
|
cache-intrinsic.ll
|
…
|
|
call-imm.ll
|
…
|
|
call-push.ll
|
…
|
|
cas.ll
|
…
|
|
cast-vsel.ll
|
[X86][SSE] Attempt to combine 64-bit and 32-bit shuffles to unary shuffles before bit shifts
|
2017-07-02 14:16:25 +00:00 |
catch.ll
|
…
|
|
catchpad-dynamic-alloca.ll
|
…
|
|
catchpad-lifetime.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
catchpad-realign-savexmm.ll
|
…
|
|
catchpad-regmask.ll
|
…
|
|
catchpad-reuse.ll
|
…
|
|
catchpad-weight.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
catchret-empty-fallthrough.ll
|
…
|
|
catchret-fallthrough.ll
|
…
|
|
catchret-regmask.ll
|
…
|
|
cfi.ll
|
…
|
|
cfstring.ll
|
…
|
|
chain_order.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
change-compare-stride-1.ll
|
…
|
|
change-compare-stride-trickiness-0.ll
|
…
|
|
change-compare-stride-trickiness-1.ll
|
…
|
|
change-compare-stride-trickiness-2.ll
|
…
|
|
change-unsafe-fp-math.ll
|
[TM] Restore default TargetOptions in TargetMachine::resetTargetOptions.
|
2017-01-10 23:43:04 +00:00 |
cleanuppad-inalloca.ll
|
…
|
|
cleanuppad-large-codemodel.ll
|
…
|
|
cleanuppad-realign.ll
|
…
|
|
clear_upper_vector_element_bits.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
clflushopt.ll
|
[X86] Add test for clflushopt intrinsic and only enable it to be selected if the feature flag is set.
|
2017-02-08 05:45:46 +00:00 |
clobber-fi0.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
clz.ll
|
[SelectionDAG] Use known ones to provide a better bound for the known zeros for CTTZ/CTLZ operations.
|
2017-05-01 16:08:06 +00:00 |
clzero.ll
|
[X86] Clzero intrinsic and its addition under znver1
|
2017-02-09 04:27:34 +00:00 |
cmov-double.ll
|
…
|
|
cmov-fp.ll
|
…
|
|
cmov-into-branch.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:05:43 +00:00 |
cmov.ll
|
[x86] auto-generate full checks; NFC
|
2017-07-11 22:04:36 +00:00 |
cmovcmov.ll
|
CodeGen: BlockPlacement: Precompute layout for chains of triangles.
|
2017-03-03 01:00:22 +00:00 |
cmp-fast-isel.ll
|
…
|
|
cmp.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
cmpxchg-clobber-flags.ll
|
…
|
|
cmpxchg-i1.ll
|
…
|
|
cmpxchg-i128-i1.ll
|
…
|
|
cmpxchg8b_alloca_regalloc_handling.ll
|
…
|
|
cmpxchg16b.ll
|
…
|
|
coal-sections.ll
|
…
|
|
coalesce-esp.ll
|
…
|
|
coalesce-implicitdef.ll
|
…
|
|
coalesce_commute_movsd.ll
|
…
|
|
coalesce_commute_subreg.ll
|
…
|
|
coalescer-commute1.ll
|
…
|
|
coalescer-commute2.ll
|
…
|
|
coalescer-commute3.ll
|
…
|
|
coalescer-commute4.ll
|
…
|
|
coalescer-commute5.ll
|
…
|
|
coalescer-cross.ll
|
…
|
|
coalescer-dce.ll
|
…
|
|
coalescer-dce2.ll
|
…
|
|
coalescer-identity.ll
|
…
|
|
coalescer-remat.ll
|
…
|
|
coalescer-subreg.ll
|
…
|
|
coalescer-win64.ll
|
…
|
|
code_placement.ll
|
…
|
|
code_placement_align_all.ll
|
…
|
|
code_placement_cold_loop_blocks.ll
|
Revert Revert [MBP] do not rotate loop if it creates extra branch
|
2017-07-11 08:34:58 +00:00 |
code_placement_eh.ll
|
…
|
|
code_placement_ignore_succ_in_inner_loop.ll
|
…
|
|
code_placement_loop_rotation.ll
|
…
|
|
code_placement_loop_rotation2.ll
|
…
|
|
code_placement_loop_rotation3.ll
|
…
|
|
codegen-prepare-addrmode-sext.ll
|
Turn on -addr-sink-using-gep by default.
|
2017-04-06 22:42:18 +00:00 |
codegen-prepare-cast.ll
|
…
|
|
codegen-prepare-crash.ll
|
…
|
|
codegen-prepare-extload.ll
|
[CodeGenPrep]Restructure promoting Ext to form ExtLoad
|
2017-03-17 19:05:21 +00:00 |
codegen-prepare.ll
|
Turn on -addr-sink-using-gep by default.
|
2017-04-06 22:42:18 +00:00 |
codemodel.ll
|
…
|
|
coff-comdat.ll
|
…
|
|
coff-comdat2.ll
|
…
|
|
coff-comdat3.ll
|
…
|
|
coff-feat00.ll
|
…
|
|
coff-weak.ll
|
…
|
|
coldcc64.ll
|
…
|
|
combine-64bit-vec-binop.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:05:43 +00:00 |
combine-abs.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
combine-add.ll
|
…
|
|
combine-and.ll
|
[X86][SSE] Combine (VSRLI (VSRAI X, Y), (NumSignBits-1)) -> (VSRLI X, (NumSignBits-1))
|
2017-03-25 20:43:01 +00:00 |
combine-avx-intrinsics.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 15:27:19 +00:00 |
combine-avx2-intrinsics.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 15:27:19 +00:00 |
combine-fcopysign.ll
|
[X86][SSE] Add support for combining scalar_to_vector(extract_vector_elt) into a target shuffle.
|
2017-02-03 17:59:58 +00:00 |
combine-lds.ll
|
…
|
|
combine-mul.ll
|
…
|
|
combine-multiplies.ll
|
…
|
|
combine-or.ll
|
[DAG] add splat vector support for 'or' in SimplifyDemandedBits
|
2017-04-19 22:00:00 +00:00 |
combine-pmuldq.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
combine-rotates.ll
|
[X86][AVX512] Add lowering of vXi32/vXi64 ISD::ROTL/ISD::ROTR
|
2017-07-17 14:11:30 +00:00 |
combine-sdiv.ll
|
…
|
|
combine-sext-in-reg.ll
|
…
|
|
combine-shl.ll
|
[DAGCombiner] Match non-uniform constant vectors using predicates.
|
2017-07-20 10:13:40 +00:00 |
combine-sra.ll
|
[X86][SSE] Add extra (sra (sra x, c1), c2) -> (sra x, (add c1, c2)) test case
|
2017-07-21 10:22:49 +00:00 |
combine-srem.ll
|
…
|
|
combine-srl.ll
|
[DAGCombiner] Match ISD::SRL non-uniform constant vectors patterns using predicates.
|
2017-07-20 11:03:30 +00:00 |
combine-sse41-intrinsics.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 15:27:19 +00:00 |
combine-sub.ll
|
…
|
|
combine-testm-and.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
combine-udiv.ll
|
[X86][AVX] Regenerate combine tests with constant broadcast comments
|
2017-07-16 11:36:11 +00:00 |
combine-urem.ll
|
[X86][AVX] Regenerate combine tests with constant broadcast comments
|
2017-07-16 11:36:11 +00:00 |
commute-3dnow.ll
|
[X86][3DNow!] Add tests to ensure PFMAX/PFMIN are not commuted.
|
2017-02-11 14:01:37 +00:00 |
commute-blend-avx2.ll
|
…
|
|
commute-blend-sse41.ll
|
…
|
|
commute-clmul.ll
|
[X86] Regenerate CLMUL commutation tests.
|
2017-02-11 12:23:22 +00:00 |
commute-fcmp.ll
|
[X86][SSE] Regenerate float comparison commutation tests.
|
2017-02-11 12:29:56 +00:00 |
commute-intrinsic.ll
|
…
|
|
commute-two-addr.ll
|
…
|
|
commute-xop.ll
|
[X86][XOP] Regenerate XOP commutation tests.
|
2017-02-11 12:30:59 +00:00 |
commuted-blend-mask.ll
|
[X86][SSE] Add i686 triple tests for PBLENDW commutation
|
2017-05-04 13:08:09 +00:00 |
compact-unwind.ll
|
…
|
|
compare-add.ll
|
…
|
|
compare-global.ll
|
X86: Teach X86InstrInfo::analyzeCompare to recognize compares of symbols.
|
2017-02-09 21:58:24 +00:00 |
compare-inf.ll
|
…
|
|
compare_folding.ll
|
…
|
|
compiler_used.ll
|
…
|
|
complex-asm.ll
|
…
|
|
complex-fastmath.ll
|
[X86][SSE] Tests showing the lowering of float/double complex multiplications with fastmath (PR31866)
|
2017-02-06 22:42:43 +00:00 |
complex-fca.ll
|
…
|
|
compress_expand.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
computeKnownBits_urem.ll
|
…
|
|
conditional-indecrement.ll
|
[x86] check for commuted add pattern to find ADC/SBB
|
2017-03-04 00:18:31 +00:00 |
conditional-tailcall-samedest.mir
|
Fix conditional tail call branch folding when both edges are the same
|
2017-07-28 19:48:40 +00:00 |
conditional-tailcall.ll
|
Re-apply r282920 "X86: Allow conditional tail calls in Win64 "leaf" functions (PR26302)"
|
2017-02-16 19:04:42 +00:00 |
const-base-addr.ll
|
…
|
|
constant-combines.ll
|
Regenerate expected result for test constant-combines.ll . NFC
|
2017-05-22 07:49:16 +00:00 |
constant-hoisting-and.ll
|
…
|
|
constant-hoisting-bfi.ll
|
[ConstHoisting] choose to hoist when frequency is the same.
|
2017-07-06 22:32:27 +00:00 |
constant-hoisting-cmp.ll
|
…
|
|
constant-hoisting-optnone.ll
|
…
|
|
constant-hoisting-shift-immediate.ll
|
…
|
|
constant-pool-remat-0.ll
|
…
|
|
constant-pool-sharing.ll
|
…
|
|
constpool.ll
|
…
|
|
constructor.ll
|
[Solaris] emit .init_array instead of .ctors on Solaris (Sparc/x86)
|
2017-06-21 20:36:32 +00:00 |
convert-2-addr-3-addr-inc64.ll
|
…
|
|
copy-eflags.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
copy-propagation.ll
|
MachineCopyPropagation: Do not consider undef operands as clobbers
|
2017-02-04 02:27:13 +00:00 |
copysign-constant-magnitude.ll
|
…
|
|
cpus.ll
|
[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
|
2017-06-29 10:00:33 +00:00 |
crash-O0.ll
|
…
|
|
crash-lre-eliminate-dead-def.ll
|
…
|
|
crash-nosse.ll
|
…
|
|
crash.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
critical-anti-dep-breaker.ll
|
…
|
|
critical-edge-split-2.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
cse-add-with-overflow.ll
|
…
|
|
cstring.ll
|
…
|
|
ctpop-combine.ll
|
[SelectionDAG] Improve known bits support for CTPOP.
|
2017-05-04 04:33:27 +00:00 |
cvt16.ll
|
…
|
|
cvtv2f32.ll
|
…
|
|
cxx_tlscc64.ll
|
…
|
|
dag-fmf-cse.ll
|
[SDAG] Remove -enable-fmf-dag
|
2017-03-28 23:46:14 +00:00 |
dag-merge-fast-accesses.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
dag-optnone.ll
|
…
|
|
dag-rauw-cse.ll
|
…
|
|
dag-update-nodetomatch.ll
|
[SelectionDAG] Fix for PR30775: Assertion `NodeToMatch->getOpcode() !=
|
2017-02-03 12:28:40 +00:00 |
dagcombine-and-setcc.ll
|
[SelectionDAG] Handle inverted conditions when splitting into multiple branches.
|
2017-01-24 16:36:07 +00:00 |
dagcombine-buildvector.ll
|
…
|
|
dagcombine-cse.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
dagcombine-shifts.ll
|
…
|
|
dagcombine-unsafe-math.ll
|
…
|
|
darwin-bzero.ll
|
…
|
|
darwin-no-dead-strip.ll
|
…
|
|
darwin-quote.ll
|
…
|
|
darwin-tls.ll
|
…
|
|
dbg-baseptr.ll
|
Re-land "Use the frame index side table for byval and inalloca arguments"
|
2017-05-09 16:02:20 +00:00 |
dbg-changes-codegen-branch-folding.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
dbg-changes-codegen.ll
|
…
|
|
dbg-combine.ll
|
…
|
|
debug-nodebug-crash.ll
|
Forgot to add triple to test in r308513.
|
2017-07-19 21:45:21 +00:00 |
debugloc-argsize.ll
|
…
|
|
deopt-bundles.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
deopt-intrinsic-cconv.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
deopt-intrinsic.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
disable-tail-calls.ll
|
…
|
|
discontiguous-loops.ll
|
…
|
|
div-rem-simplify.ll
|
[DAG] vector div/rem with any zero element in divisor is undef
|
2017-03-14 18:06:28 +00:00 |
div8.ll
|
…
|
|
divide-by-constant.ll
|
…
|
|
divide-windows-itanium.ll
|
…
|
|
divrem.ll
|
…
|
|
divrem8_ext.ll
|
[DAGCombiner] Make DAGCombiner smarter about overflow
|
2017-02-06 14:54:49 +00:00 |
dllexport-x86_64.ll
|
…
|
|
dllexport.ll
|
…
|
|
dllimport-x86_64.ll
|
…
|
|
dllimport.ll
|
…
|
|
dollar-name.ll
|
…
|
|
dont-trunc-store-double-to-float.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
dropped_constructor.ll
|
Don't create a comdat group for a dropped def with initializer
|
2017-01-18 16:58:43 +00:00 |
dwarf-comp-dir.ll
|
…
|
|
dwarf-eh-prepare.ll
|
…
|
|
dwarf-headers.ll
|
Move Split DWARF handling to an MC option/command line argument rather than using metadata
|
2017-04-21 23:35:26 +00:00 |
dyn-stackalloc.ll
|
…
|
|
dyn_alloca_aligned.ll
|
…
|
|
dynamic-alloca-in-entry.ll
|
…
|
|
dynamic-alloca-lifetime.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
dynamic-allocas-VLAs.ll
|
…
|
|
early-cfi-sections.ll
|
Emit .cfi_sections before the first .cfi_startproc
|
2017-01-02 18:05:27 +00:00 |
early-ifcvt-crash.ll
|
…
|
|
early-ifcvt.ll
|
…
|
|
eflags-copy-expansion.mir
|
MIParser/MIRPrinter: Compute block successors if not explicitely specified
|
2017-05-05 21:09:30 +00:00 |
eh-frame-unreachable.ll
|
Don't emit CFI instructions at the end of a function
|
2017-04-24 18:45:59 +00:00 |
eh-label.ll
|
…
|
|
eh-nolandingpads.ll
|
…
|
|
eh-null-personality.ll
|
…
|
|
eh-unknown.ll
|
[EH] Fix the LSDA that we emit for unknown EH personalities
|
2017-05-31 22:18:49 +00:00 |
eh_frame.ll
|
…
|
|
element-wise-atomic-memory-intrinsics.ll
|
Add element atomic memset intrinsic
|
2017-07-12 21:57:23 +00:00 |
elf-associated.ll
|
Ignore !associated metadata with null argument.
|
2017-05-08 23:46:20 +00:00 |
elf-comdat.ll
|
…
|
|
elf-comdat2.ll
|
…
|
|
emit-big-cst.ll
|
…
|
|
empty-function.ll
|
Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"
|
2017-04-21 21:48:41 +00:00 |
empty-functions.ll
|
Don't emit CFI instructions at the end of a function
|
2017-04-24 18:45:59 +00:00 |
empty-struct-return-type.ll
|
…
|
|
emutls-pic.ll
|
…
|
|
emutls-pie.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
emutls.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
emutls_generic.ll
|
…
|
|
epilogue.ll
|
…
|
|
equiv_with_fndef.ll
|
…
|
|
equiv_with_vardef.ll
|
…
|
|
evex-to-vex-compress.mir
|
[AVX-512] Add EVEX2VEX test cases for the cvt instructions fixed in r297599 and r297600.
|
2017-03-13 05:47:56 +00:00 |
exception-label.ll
|
…
|
|
exedeps-movq.ll
|
…
|
|
exedepsfix-broadcast.ll
|
…
|
|
expand-opaque-const.ll
|
…
|
|
expand-vr64-gr64-copy.mir
|
…
|
|
extend.ll
|
…
|
|
extended-fma-contraction.ll
|
…
|
|
extern_weak.ll
|
…
|
|
extmul64.ll
|
…
|
|
extmul128.ll
|
…
|
|
extract-combine.ll
|
…
|
|
extract-concat.ll
|
…
|
|
extract-extract.ll
|
…
|
|
extract-store.ll
|
[X86][SSE] Attempt to combine 64-bit and 32-bit shuffles to unary shuffles before bit shifts
|
2017-07-02 14:16:25 +00:00 |
extractelement-from-arg.ll
|
…
|
|
extractelement-index.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
extractelement-legalization-cycle.ll
|
…
|
|
extractelement-legalization-store-ordering.ll
|
This patch completely replaces the scheduling information for the SandyBridge architecture target by modifying the file X86SchedSandyBridge.td located under the X86 Target.
|
2017-07-10 09:53:16 +00:00 |
extractelement-load.ll
|
…
|
|
extractelement-shuffle.ll
|
…
|
|
extractps.ll
|
…
|
|
f16c-intrinsics-fast-isel.ll
|
…
|
|
f16c-intrinsics.ll
|
…
|
|
f16c-schedule.ll
|
This patch returns proper value to indicate the case when instruction throughput can't be calculated.
|
2017-07-26 18:55:14 +00:00 |
fabs.ll
|
…
|
|
fadd-combines.ll
|
DAG: Check no signed zeros instead of unsafe math attribute
|
2017-03-09 01:36:39 +00:00 |
fast-cc-callee-pops.ll
|
…
|
|
fast-cc-merge-stack-adj.ll
|
…
|
|
fast-cc-pass-in-regs.ll
|
…
|
|
fast-isel-abort-warm.ll
|
[FastISel] fix a fallback diagnostic.
|
2017-07-09 05:55:20 +00:00 |
fast-isel-agg-constant.ll
|
…
|
|
fast-isel-args-fail.ll
|
…
|
|
fast-isel-args-fail2.ll
|
…
|
|
fast-isel-args.ll
|
…
|
|
fast-isel-atomic.ll
|
…
|
|
fast-isel-avoid-unnecessary-pic-base.ll
|
…
|
|
fast-isel-bail.ll
|
…
|
|
fast-isel-bc.ll
|
…
|
|
fast-isel-bitcasts-avx.ll
|
…
|
|
fast-isel-bitcasts-avx512.ll
|
…
|
|
fast-isel-bitcasts.ll
|
…
|
|
fast-isel-branch_weights.ll
|
…
|
|
fast-isel-call-bool.ll
|
…
|
|
fast-isel-call.ll
|
…
|
|
fast-isel-cmp-branch.ll
|
…
|
|
fast-isel-cmp-branch2.ll
|
…
|
|
fast-isel-cmp-branch3.ll
|
…
|
|
fast-isel-cmp.ll
|
[x86] don't blindly transform SETB into SBB
|
2017-03-12 18:28:48 +00:00 |
fast-isel-constant.ll
|
…
|
|
fast-isel-constpool.ll
|
…
|
|
fast-isel-constrain-store-indexreg.ll
|
…
|
|
fast-isel-deadcode.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
fast-isel-divrem-x86-64.ll
|
…
|
|
fast-isel-divrem.ll
|
…
|
|
fast-isel-double-half-convertion.ll
|
…
|
|
fast-isel-emutls.ll
|
…
|
|
fast-isel-expect.ll
|
…
|
|
fast-isel-extract.ll
|
…
|
|
fast-isel-float-half-convertion.ll
|
…
|
|
fast-isel-fneg.ll
|
…
|
|
fast-isel-fold-mem.ll
|
…
|
|
fast-isel-fptrunc-fpext.ll
|
…
|
|
fast-isel-gc-intrinsics.ll
|
[FastISel] Move gc intrinsic test to X86 directory
|
2017-07-04 15:24:08 +00:00 |
fast-isel-gep.ll
|
…
|
|
fast-isel-gv.ll
|
…
|
|
fast-isel-i1.ll
|
…
|
|
fast-isel-int-float-conversion.ll
|
…
|
|
fast-isel-load-i1.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
fast-isel-mem.ll
|
…
|
|
fast-isel-movsbl-indexreg.ll
|
…
|
|
fast-isel-nontemporal.ll
|
[X86][AVX1] Split 256-bit vector non-temporal FastISel loads to keep it non-temporal (PR32744)
|
2017-06-06 14:18:39 +00:00 |
fast-isel-ret-ext.ll
|
…
|
|
fast-isel-select-cmov.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
fast-isel-select-cmov2.ll
|
…
|
|
fast-isel-select-cmp.ll
|
AsmPrinter: mark the beginning and the end of a function in verbose mode
|
2017-05-23 21:22:16 +00:00 |
fast-isel-select-pseudo-cmov.ll
|
…
|
|
fast-isel-select-sse.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:05:43 +00:00 |
fast-isel-select.ll
|
…
|
|
fast-isel-sext.ll
|
…
|
|
fast-isel-sse12-fptoint.ll
|
…
|
|
fast-isel-stackcheck.ll
|
…
|
|
fast-isel-store.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
fast-isel-tailcall.ll
|
…
|
|
fast-isel-tls.ll
|
…
|
|
fast-isel-trunc-kill-subreg.ll
|
…
|
|
fast-isel-vecload.ll
|
…
|
|
fast-isel-x32.ll
|
…
|
|
fast-isel-x86-64.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
fast-isel-x86.ll
|
[CodeGen] Pass SDAG an ORE, and replace FastISel stats with remarks.
|
2017-03-30 17:49:58 +00:00 |
fast-isel.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
fastcall-correct-mangling.ll
|
…
|
|
fastcc-2.ll
|
…
|
|
fastcc-byval.ll
|
…
|
|
fastcc-sret.ll
|
…
|
|
fastcc.ll
|
…
|
|
fastcc3struct.ll
|
…
|
|
fastisel-gep-promote-before-add.ll
|
…
|
|
fastisel-softfloat.ll
|
[X86/FastIsel] Fall-back to SelectionDAG when lowering soft-floats.
|
2017-07-12 15:26:06 +00:00 |
fastmath-float-half-conversion.ll
|
…
|
|
fcmove.ll
|
…
|
|
fdiv-combine.ll
|
…
|
|
fdiv.ll
|
…
|
|
fentry-insertion.ll
|
[X86] Implement -mfentry
|
2017-01-31 17:00:27 +00:00 |
field-extract-use-trunc.ll
|
…
|
|
fildll.ll
|
…
|
|
file-source-filename.ll
|
CodeGen: Use the source filename as the argument to .file, rather than the module ID.
|
2017-03-15 16:24:52 +00:00 |
fixup-bw-copy.ll
|
…
|
|
fixup-bw-copy.mir
|
…
|
|
fixup-bw-inst.ll
|
…
|
|
fixup-lea.ll
|
…
|
|
float-asmprint.ll
|
…
|
|
float-conv-elim.ll
|
…
|
|
floor-soft-float.ll
|
…
|
|
fltused.ll
|
…
|
|
fltused_function_pointer.ll
|
…
|
|
fma-commute-x86.ll
|
…
|
|
fma-do-not-commute.ll
|
…
|
|
fma-fneg-combine.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
fma-intrinsics-phi-213-to-231.ll
|
…
|
|
fma-intrinsics-x86.ll
|
…
|
|
fma-phi-213-to-231.ll
|
…
|
|
fma-scalar-memfold.ll
|
…
|
|
fma.ll
|
[AVX-512] Make VEX encoded FMA instructions available when AVX512 is enabled regardless of whether +fma was added on the command line.
|
2017-03-17 07:37:31 +00:00 |
fma4-intrinsics-x86_64-folded-load.ll
|
…
|
|
fma_patterns.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
fma_patterns_wide.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
fmaddsub-combine.ll
|
X86-specific path: Implemented the fusing of MUL+ADDSUB to FMADDSUB.
|
2017-01-09 20:26:17 +00:00 |
fmaxnum.ll
|
…
|
|
fminnum.ll
|
…
|
|
fmsubadd-combine.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
fmul-combines.ll
|
…
|
|
fmul-zero.ll
|
…
|
|
fnabs.ll
|
…
|
|
fold-add.ll
|
…
|
|
fold-and-shift.ll
|
…
|
|
fold-call-2.ll
|
…
|
|
fold-call-3.ll
|
…
|
|
fold-call-oper.ll
|
…
|
|
fold-call.ll
|
…
|
|
fold-imm.ll
|
…
|
|
fold-load-binops.ll
|
…
|
|
fold-load-unops.ll
|
…
|
|
fold-load-vec.ll
|
…
|
|
fold-load.ll
|
…
|
|
fold-mul-lohi.ll
|
…
|
|
fold-pcmpeqd-1.ll
|
…
|
|
fold-pcmpeqd-2.ll
|
…
|
|
fold-push.ll
|
…
|
|
fold-sext-trunc.ll
|
…
|
|
fold-tied-op.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
fold-vector-bv-crash.ll
|
…
|
|
fold-vector-sext-crash.ll
|
…
|
|
fold-vector-sext-crash2.ll
|
…
|
|
fold-vector-sext-zext.ll
|
[X86][SSE] Use VSEXT/VZEXT constant folding for SIGN_EXTEND_VECTOR_INREG/ZERO_EXTEND_VECTOR_INREG
|
2017-02-11 22:47:06 +00:00 |
fold-vector-shl-crash.ll
|
…
|
|
fold-vector-shuffle-crash.ll
|
…
|
|
fold-vector-trunc-sitofp.ll
|
…
|
|
fold-vex.ll
|
…
|
|
fold-xmm-zero.ll
|
…
|
|
fold-zext-trunc.ll
|
…
|
|
fops-windows-itanium.ll
|
…
|
|
force-align-stack-alloca.ll
|
…
|
|
force-align-stack.ll
|
…
|
|
fp-double-rounding.ll
|
…
|
|
fp-elim-and-no-fp-elim.ll
|
…
|
|
fp-elim.ll
|
…
|
|
fp-fast.ll
|
…
|
|
fp-immediate-shorten.ll
|
…
|
|
fp-in-intregs.ll
|
…
|
|
fp-intrinsics.ll
|
Add constrained intrinsics for some libm-equivalent operations
|
2017-05-25 21:31:00 +00:00 |
fp-load-trunc.ll
|
…
|
|
fp-logic-replace.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:05:43 +00:00 |
fp-logic.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:05:43 +00:00 |
fp-select-cmp-and.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
fp-stack-2results.ll
|
…
|
|
fp-stack-O0-crash.ll
|
…
|
|
fp-stack-O0.ll
|
…
|
|
fp-stack-compare-cmov.ll
|
…
|
|
fp-stack-compare.ll
|
…
|
|
fp-stack-direct-ret.ll
|
…
|
|
fp-stack-ret-conv.ll
|
…
|
|
fp-stack-ret-store.ll
|
…
|
|
fp-stack-ret.ll
|
…
|
|
fp-stack-retcopy.ll
|
…
|
|
fp-stack-set-st1.ll
|
…
|
|
fp-stack.ll
|
…
|
|
fp-trunc.ll
|
…
|
|
fp-une-cmp.ll
|
CodeGen: Allow small copyable blocks to "break" the CFG.
|
2017-01-31 23:48:32 +00:00 |
fp2sint.ll
|
…
|
|
fp128-calling-conv.ll
|
…
|
|
fp128-cast.ll
|
Another test commit.
|
2017-06-28 17:12:51 +00:00 |
fp128-compare.ll
|
[legalize-types] Remove stale entries from SoftenedFloats.
|
2017-03-04 12:00:35 +00:00 |
fp128-extract.ll
|
[X86] Keep EXTRACT_VECTOR_ELT result type as f128 for Android x86_64.
|
2017-04-18 20:15:18 +00:00 |
fp128-g.ll
|
[legalize-types] Remove stale entries from SoftenedFloats.
|
2017-03-04 12:00:35 +00:00 |
fp128-i128.ll
|
This patch completely replaces the scheduling information for the SandyBridge architecture target by modifying the file X86SchedSandyBridge.td located under the X86 Target.
|
2017-07-10 09:53:16 +00:00 |
fp128-libcalls.ll
|
[legalize-types] Remove stale entries from SoftenedFloats.
|
2017-03-04 12:00:35 +00:00 |
fp128-load.ll
|
[legalize-types] Remove stale entries from SoftenedFloats.
|
2017-03-04 12:00:35 +00:00 |
fp128-select.ll
|
[legalize-types] Remove stale entries from SoftenedFloats.
|
2017-03-04 12:00:35 +00:00 |
fp128-store.ll
|
…
|
|
fp_constant_op.ll
|
…
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|
fp_load_cast_fold.ll
|
…
|
|
fp_load_fold.ll
|
…
|
|
fpcmp-soft-fp.ll
|
…
|
|
fpstack-debuginstr-kill.ll
|
…
|
|
frame-base.ll
|
…
|
|
frame-lowering-debug-intrinsic-2.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
frame-lowering-debug-intrinsic.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
frame-order.ll
|
…
|
|
frameaddr.ll
|
…
|
|
frameregister.ll
|
…
|
|
frem-msvc32.ll
|
…
|
|
fsgsbase.ll
|
…
|
|
fsxor-alignment.ll
|
…
|
|
full-lsr.ll
|
Revert r304824 "Fix PR23384 (part 3 of 3)"
|
2017-06-19 17:57:15 +00:00 |
funclet-layout.ll
|
…
|
|
function-alias.ll
|
…
|
|
function-subtarget-features-2.ll
|
…
|
|
function-subtarget-features.ll
|
…
|
|
ga-offset.ll
|
…
|
|
ga-offset2.ll
|
…
|
|
gather-addresses.ll
|
This patch completely replaces the scheduling information for the SandyBridge architecture target by modifying the file X86SchedSandyBridge.td located under the X86 Target.
|
2017-07-10 09:53:16 +00:00 |
gcc_except_table.ll
|
…
|
|
gcc_except_table_functions.ll
|
…
|
|
gep-expanded-vector.ll
|
…
|
|
getelementptr.ll
|
…
|
|
ghc-cc.ll
|
…
|
|
ghc-cc64.ll
|
…
|
|
global-access-pie-copyrelocs.ll
|
…
|
|
global-access-pie.ll
|
…
|
|
global-fill.ll
|
…
|
|
global-sections-comdat.ll
|
…
|
|
global-sections-tls.ll
|
…
|
|
global-sections.ll
|
…
|
|
gnu-seh-nolpads.ll
|
[EH] Recognize __(gxx|gcc)_personality_seh0 as the GNU EH personalities
|
2017-05-31 22:35:52 +00:00 |
gs-fold.ll
|
…
|
|
h-register-addressing-32.ll
|
…
|
|
h-register-addressing-64.ll
|
…
|
|
h-register-store.ll
|
…
|
|
h-registers-0.ll
|
…
|
|
h-registers-1.ll
|
…
|
|
h-registers-2.ll
|
…
|
|
h-registers-3.ll
|
…
|
|
haddsub-2.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
haddsub-undef.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
haddsub.ll
|
…
|
|
half.ll
|
NFC.
|
2017-07-04 21:51:05 +00:00 |
handle-move.ll
|
…
|
|
hhvm-cc.ll
|
…
|
|
hidden-vis-2.ll
|
…
|
|
hidden-vis-3.ll
|
…
|
|
hidden-vis-4.ll
|
…
|
|
hidden-vis-pic.ll
|
…
|
|
hidden-vis.ll
|
…
|
|
hipe-cc.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
hipe-cc64.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
hipe-prologue.ll
|
…
|
|
hoist-common.ll
|
…
|
|
hoist-invariant-load.ll
|
CodeGen: Rename DEBUG_TYPE to match passnames
|
2017-05-25 21:26:32 +00:00 |
hoist-spill-lpad.ll
|
…
|
|
hoist-spill.ll
|
Revert r304824 "Fix PR23384 (part 3 of 3)"
|
2017-06-19 17:57:15 +00:00 |
horizontal-shuffle.ll
|
…
|
|
huge-stack-offset.ll
|
…
|
|
huge-stack-offset2.ll
|
[X86] Emit fewer instructions to allocate >16GB stack frames
|
2017-03-17 20:25:49 +00:00 |
i1narrowfail.ll
|
…
|
|
i2k.ll
|
…
|
|
i16lshr8pat.ll
|
…
|
|
i64-mem-copy.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
i64-to-float.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
i128-and-beyond.ll
|
…
|
|
i128-immediate.ll
|
…
|
|
i128-mul.ll
|
…
|
|
i128-ret.ll
|
…
|
|
i128-sdiv.ll
|
…
|
|
i256-add.ll
|
[SDAG] Teach Chain Analysis about BaseIndexOffset addressing.
|
2017-04-24 15:37:20 +00:00 |
i386-setjmp-pic.ll
|
…
|
|
i386-shrink-wrapping.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
i386-tlscall-fastregalloc.ll
|
…
|
|
i486-fence-loop.ll
|
…
|
|
i686-win-shrink-wrapping.ll
|
…
|
|
iabs.ll
|
…
|
|
ident-metadata.ll
|
…
|
|
ifunc-asm.ll
|
…
|
|
illegal-bitfield-loadstore.ll
|
[X86] Test bitfield loadstore tests on i686 as well
|
2017-07-05 18:09:30 +00:00 |
illegal-insert.ll
|
…
|
|
illegal-vector-args-return.ll
|
…
|
|
immediate_merging.ll
|
…
|
|
immediate_merging64.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
implicit-null-check-negative.ll
|
…
|
|
implicit-null-check.ll
|
[ImplicitNullCheck] Extend Implicit Null Check scope by using stores
|
2017-02-07 19:19:49 +00:00 |
implicit-null-checks.mir
|
Fix machine instruction in test case
|
2017-06-19 22:35:48 +00:00 |
implicit-use-spill.mir
|
MIRTests: Remove unnecessary 2>&1 redirection
|
2017-02-22 18:47:41 +00:00 |
imul-lea-2.ll
|
…
|
|
imul-lea.ll
|
…
|
|
imul.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
inalloca-ctor.ll
|
…
|
|
inalloca-invoke.ll
|
…
|
|
inalloca-regparm.ll
|
…
|
|
inalloca-stdcall.ll
|
…
|
|
inalloca.ll
|
…
|
|
inconsistent_landingpad.ll
|
…
|
|
indirect-hidden.ll
|
…
|
|
init-priority.ll
|
…
|
|
inline-0bh.ll
|
2 tests that were lost in rL301390
|
2017-04-27 10:20:35 +00:00 |
inline-asm-2addr.ll
|
…
|
|
inline-asm-A-constraint.ll
|
Use correct registers for "A" inline asm constraint
|
2017-04-15 22:15:01 +00:00 |
inline-asm-R-constraint.ll
|
…
|
|
inline-asm-avx-v-constraint-32bit.ll
|
…
|
|
inline-asm-avx-v-constraint.ll
|
…
|
|
inline-asm-avx512f-v-constraint.ll
|
…
|
|
inline-asm-avx512vl-v-constraint-32bit.ll
|
…
|
|
inline-asm-avx512vl-v-constraint.ll
|
…
|
|
inline-asm-bad-constraint-n.ll
|
…
|
|
inline-asm-duplicated-constraint.ll
|
…
|
|
inline-asm-error.ll
|
…
|
|
inline-asm-flag-clobber.ll
|
…
|
|
inline-asm-fpstack.ll
|
…
|
|
inline-asm-h.ll
|
…
|
|
inline-asm-modifier-n.ll
|
…
|
|
inline-asm-modifier-q.ll
|
…
|
|
inline-asm-mrv.ll
|
…
|
|
inline-asm-out-regs.ll
|
…
|
|
inline-asm-pic.ll
|
…
|
|
inline-asm-ptr-cast.ll
|
…
|
|
inline-asm-q-regs.ll
|
…
|
|
inline-asm-sp-clobber-memcpy.ll
|
…
|
|
inline-asm-stack-realign.ll
|
…
|
|
inline-asm-stack-realign2.ll
|
…
|
|
inline-asm-stack-realign3.ll
|
…
|
|
inline-asm-tied.ll
|
Elide argument copies during instruction selection
|
2017-03-01 21:42:00 +00:00 |
inline-asm-x-scalar.ll
|
…
|
|
inline-asm.ll
|
…
|
|
inline-sse.ll
|
…
|
|
inlineasm-sched-bug.ll
|
…
|
|
inreg.ll
|
…
|
|
ins_split_regalloc.ll
|
…
|
|
ins_subreg_coalesce-1.ll
|
…
|
|
ins_subreg_coalesce-2.ll
|
…
|
|
ins_subreg_coalesce-3.ll
|
…
|
|
insert-positions.ll
|
…
|
|
insertelement-copytoregs.ll
|
…
|
|
insertelement-duplicates.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
insertelement-legalize.ll
|
…
|
|
insertelement-zero.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
insertps-O0-bug.ll
|
…
|
|
insertps-combine.ll
|
[X86][SSE] Dropped -mcpu from insertps tests
|
2017-06-23 11:00:49 +00:00 |
insertps-from-constantpool.ll
|
…
|
|
insertps-unfold-load-bug.ll
|
…
|
|
int-intrinsic.ll
|
…
|
|
interval-update-remat.ll
|
…
|
|
invalid-liveness.mir
|
MIParser/MIRPrinter: Compute block successors if not explicitely specified
|
2017-05-05 21:09:30 +00:00 |
invalid-shift-immediate.ll
|
…
|
|
ipra-inline-asm.ll
|
…
|
|
ipra-local-linkage.ll
|
…
|
|
ipra-reg-alias.ll
|
…
|
|
ipra-reg-usage.ll
|
Revert r295004 (Add MXCSR) due to errors reported by MachineVerifier
|
2017-03-13 20:35:10 +00:00 |
ipra-transform.ll
|
…
|
|
isel-optnone.ll
|
…
|
|
isel-sink.ll
|
Turn on -addr-sink-using-gep by default.
|
2017-04-06 22:42:18 +00:00 |
isel-sink2.ll
|
…
|
|
isel-sink3.ll
|
…
|
|
isint.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
isnan.ll
|
…
|
|
isnan2.ll
|
…
|
|
ispositive.ll
|
…
|
|
jump_sign.ll
|
[x86] auto-generate complete checks; NFC
|
2017-06-23 15:22:27 +00:00 |
known-bits-vector.ll
|
[DAGCombiner] Add vector demanded elements support to ComputeNumSignBits
|
2017-03-31 13:54:09 +00:00 |
known-bits.ll
|
Do not legalize large add with addc/adde, introduce addcarry and do it with uaddo/addcarry
|
2017-04-30 19:24:09 +00:00 |
known-signbits-vector.ll
|
[X86][AVX] Allow 32-bit targets to peek through subvectors to extract constant splats for vXi64 shifts.
|
2017-05-14 11:46:26 +00:00 |
label-redefinition.ll
|
…
|
|
lakemont.ll
|
…
|
|
large-code-model-isel.ll
|
…
|
|
large-constants.ll
|
…
|
|
large-gep-chain.ll
|
…
|
|
large-gep-scale.ll
|
…
|
|
large-global.ll
|
…
|
|
late-address-taken.ll
|
…
|
|
ldzero.ll
|
…
|
|
lea-2.ll
|
…
|
|
lea-3.ll
|
…
|
|
lea-4.ll
|
…
|
|
lea-5.ll
|
…
|
|
lea-opt-cse1.ll
|
[X86] Adding test cases for LEA factorization (PR32755 / D35014)
|
2017-07-27 10:36:09 +00:00 |
lea-opt-cse2.ll
|
[X86] Adding test cases for LEA factorization (PR32755 / D35014)
|
2017-07-27 10:36:09 +00:00 |
lea-opt-cse3.ll
|
[X86] Extending a test cases for LEA factorization.
|
2017-07-31 14:23:28 +00:00 |
lea-opt-memop-check-1.ll
|
…
|
|
lea-opt-memop-check-2.ll
|
…
|
|
lea-opt-with-debug.mir
|
Align definition of DW_OP_plus with DWARF spec [3/3]
|
2017-06-14 13:14:38 +00:00 |
lea-opt.ll
|
…
|
|
lea-recursion.ll
|
…
|
|
lea.ll
|
…
|
|
lea32-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
lea64-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
leaFixup32.mir
|
[X86] Replace slow LEA instructions in X86
|
2017-05-18 08:11:50 +00:00 |
leaFixup64.mir
|
[X86] Replace slow LEA instructions in X86
|
2017-05-18 08:11:50 +00:00 |
leaf-fp-elim.ll
|
…
|
|
legalize-fmp-oeq-vector-select.ll
|
…
|
|
legalize-libcalls.ll
|
…
|
|
legalize-shift-64.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
legalize-shl-vec.ll
|
…
|
|
legalize-sub-zero-2.ll
|
…
|
|
legalize-sub-zero.ll
|
…
|
|
legalizedag_vec.ll
|
…
|
|
libcall-sret.ll
|
…
|
|
licm-dominance.ll
|
…
|
|
licm-nested.ll
|
[LSR] Recommit: Allow formula containing Reg for SCEVAddRecExpr related with outerloop.
|
2017-02-11 00:50:23 +00:00 |
licm-regpressure.ll
|
…
|
|
licm-symbol.ll
|
…
|
|
limited-prec.ll
|
…
|
|
lit.local.cfg
|
…
|
|
live-out-reg-info.ll
|
…
|
|
live-range-nosubreg.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
liveness-local-regalloc.ll
|
…
|
|
llc-override-mcpu-mattr.ll
|
…
|
|
load-combine.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
load-slice.ll
|
[x86] Relax the check in areLoadsFromSameBasePtr
|
2017-04-11 21:05:02 +00:00 |
loc-remat.ll
|
…
|
|
local_stack_symbol_ordering.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
localescape.ll
|
…
|
|
log2_not_readnone.ll
|
…
|
|
logical-load-fold.ll
|
[X86] Fix execution domain for cmpss/sd instructions.
|
2017-02-26 06:45:59 +00:00 |
long-setcc.ll
|
…
|
|
longlong-deadload.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
loop-blocks.ll
|
…
|
|
loop-hoist.ll
|
…
|
|
loop-search.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
loop-strength-reduce-2.ll
|
…
|
|
loop-strength-reduce-3.ll
|
…
|
|
loop-strength-reduce-crash.ll
|
…
|
|
loop-strength-reduce.ll
|
…
|
|
loop-strength-reduce2.ll
|
…
|
|
loop-strength-reduce4.ll
|
Revert r304824 "Fix PR23384 (part 3 of 3)"
|
2017-06-19 17:57:15 +00:00 |
loop-strength-reduce5.ll
|
…
|
|
loop-strength-reduce6.ll
|
…
|
|
loop-strength-reduce7.ll
|
…
|
|
loop-strength-reduce8.ll
|
…
|
|
lower-bitcast.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
lower-vec-shift-2.ll
|
[X86] Optimize vector shifts with variable but uniform shift amounts
|
2017-01-05 15:11:43 +00:00 |
lower-vec-shift.ll
|
[X86][SSE] Dropped -mcpu from vector shift tests
|
2017-06-29 11:09:53 +00:00 |
lower-vec-shuffle-bug.ll
|
[X86][SSE] Regenerate shuffle test with update_llc_test_checks.py
|
2017-06-29 11:11:37 +00:00 |
lrshrink.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
lsr-delayed-fold.ll
|
…
|
|
lsr-i386.ll
|
…
|
|
lsr-interesting-step.ll
|
…
|
|
lsr-loop-exit-cond.ll
|
…
|
|
lsr-negative-stride.ll
|
…
|
|
lsr-nonaffine.ll
|
…
|
|
lsr-normalization.ll
|
…
|
|
lsr-overflow.ll
|
…
|
|
lsr-quadratic-expand.ll
|
…
|
|
lsr-redundant-addressing.ll
|
…
|
|
lsr-reuse-trunc.ll
|
…
|
|
lsr-reuse.ll
|
…
|
|
lsr-sort.ll
|
…
|
|
lsr-static-addr.ll
|
…
|
|
lsr-wrap.ll
|
…
|
|
lwp-intrinsics-x86_64.ll
|
[X86][LWP] Add llvm support for LWP instructions (reapplied).
|
2017-05-03 15:51:39 +00:00 |
lwp-intrinsics.ll
|
[X86][LWP] Add llvm support for LWP instructions (reapplied).
|
2017-05-03 15:51:39 +00:00 |
lzcnt-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
lzcnt-tzcnt.ll
|
…
|
|
lzcnt-zext-cmp.ll
|
[X86] Improve readability of test/CodeGen/X86/lzcnt-zext-cmp.ll by adding a common check prefix ALL. NFC.
|
2017-02-13 09:57:17 +00:00 |
lzcnt.ll
|
…
|
|
machine-combiner-int-vec.ll
|
…
|
|
machine-combiner-int.ll
|
…
|
|
machine-combiner.ll
|
…
|
|
machine-copy-prop.mir
|
…
|
|
machine-cp.ll
|
…
|
|
machine-cse.ll
|
[x86] auto-generate complete checks; NFC
|
2017-06-23 15:29:49 +00:00 |
machine-outliner-debuginfo.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
machine-outliner-tailcalls.ll
|
[Outliner] Add tail call support
|
2017-03-13 18:39:33 +00:00 |
machine-outliner.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
machine-region-info.mir
|
MIParser/MIRPrinter: Compute block successors if not explicitely specified
|
2017-05-05 21:09:30 +00:00 |
machine-sink-and-implicit-null-checks.ll
|
…
|
|
machine-sink.ll
|
…
|
|
machine-trace-metrics-crash.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
macho-comdat.ll
|
…
|
|
madd.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
mask-negated-bool.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
masked-iv-safe.ll
|
Revert r304824 "Fix PR23384 (part 3 of 3)"
|
2017-06-19 17:57:15 +00:00 |
masked-iv-unsafe.ll
|
…
|
|
masked_gather_scatter.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
masked_memop.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
maskmovdqu.ll
|
…
|
|
materialize.ll
|
…
|
|
mature-mc-support.ll
|
[LLC] Add an inline assembly diagnostics handler.
|
2017-02-03 11:14:39 +00:00 |
mbp-false-cfg-break.ll
|
…
|
|
mcinst-avx-lowering.ll
|
…
|
|
mcinst-lowering.ll
|
…
|
|
mcu-abi.ll
|
…
|
|
mem-intrin-base-reg.ll
|
…
|
|
mem-promote-integers.ll
|
…
|
|
membarrier.ll
|
…
|
|
memcmp-minsize.ll
|
[X86] Add 24-byte memcmp tests (PR33914)
|
2017-07-25 10:33:36 +00:00 |
memcmp-optsize.ll
|
[X86] Add 24-byte memcmp tests (PR33914)
|
2017-07-25 10:33:36 +00:00 |
memcmp.ll
|
[X86][CGP] Reduce memcmp() expansion to 2 load pairs (PR33914)
|
2017-07-25 17:04:37 +00:00 |
memcpy-2.ll
|
…
|
|
memcpy-from-string.ll
|
…
|
|
memcpy-struct-by-value.ll
|
add skylake
|
2017-04-21 09:21:01 +00:00 |
memcpy.ll
|
…
|
|
mempcpy-32.ll
|
[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
|
2017-02-03 19:11:19 +00:00 |
mempcpy.ll
|
[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
|
2017-02-03 19:11:19 +00:00 |
memset-2.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
memset-3.ll
|
…
|
|
memset-nonzero.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
memset-sse-stack-realignment.ll
|
…
|
|
memset.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
memset64-on-x86-32.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
merge-consecutive-loads-128.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
merge-consecutive-loads-256.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
merge-consecutive-loads-512.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
merge-consecutive-stores-i1.ll
|
…
|
|
merge-consecutive-stores.ll
|
[x86] remove overridden target settings in test; NFC
|
2017-06-23 15:06:30 +00:00 |
merge-sp-update-lea.ll
|
…
|
|
merge-store-partially-alias-loads.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
merge_store.ll
|
[SDAG] Teach Chain Analysis about BaseIndexOffset addressing.
|
2017-04-24 15:37:20 +00:00 |
merge_store_duplicated_loads.ll
|
Revert "[SDAG] Relax conditions under stores of loaded values can be merged"
|
2017-05-10 23:56:21 +00:00 |
mfence.ll
|
…
|
|
mingw-alloca.ll
|
…
|
|
misaligned-memset.ll
|
…
|
|
misched-aa-colored.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
misched-aa-mmos.ll
|
…
|
|
misched-balance.ll
|
…
|
|
misched-code-difference-with-debug.ll
|
…
|
|
misched-copy.ll
|
CodeGen: Rename DEBUG_TYPE to match passnames
|
2017-05-25 21:26:32 +00:00 |
misched-crash.ll
|
…
|
|
misched-fusion.ll
|
…
|
|
misched-ilp.ll
|
…
|
|
misched-matmul.ll
|
…
|
|
misched-matrix.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
misched-new.ll
|
…
|
|
mmx-arg-passing-x86-64.ll
|
…
|
|
mmx-arg-passing.ll
|
…
|
|
mmx-arith.ll
|
…
|
|
mmx-bitcast-fold.ll
|
…
|
|
mmx-bitcast.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
mmx-coalescing.ll
|
…
|
|
mmx-copy-gprs.ll
|
…
|
|
mmx-cvt.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
mmx-fold-load.ll
|
[X86][MMX] Fix folding of shift value loads to cover whole 64-bits
|
2017-03-13 21:23:29 +00:00 |
mmx-intrinsics.ll
|
…
|
|
mmx-only.ll
|
…
|
|
mod128.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
movbe.ll
|
…
|
|
movfs.ll
|
…
|
|
movgs.ll
|
…
|
|
movmsk.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
movntdq-no-avx.ll
|
…
|
|
movpc32-check.ll
|
…
|
|
movtopush.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
movtopush64.ll
|
…
|
|
ms-inline-asm-avx512.ll
|
[ms-inline-asm] Use the frontend size only for ambiguous instructions
|
2017-05-04 18:19:52 +00:00 |
ms-inline-asm.ll
|
…
|
|
mul-constant-i16.ll
|
This patch closes PR28513: an optimization of multiplication by different constants.
|
2017-06-08 10:20:13 +00:00 |
mul-constant-i32.ll
|
Reverting commit 306414 on behalf of @gadi.haber
|
2017-06-28 11:23:31 +00:00 |
mul-constant-i64.ll
|
Reverting commit 306414 on behalf of @gadi.haber
|
2017-06-28 11:23:31 +00:00 |
mul-constant-result.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
mul-i256.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
mul-i512.ll
|
[DAGCombine] (addcarry 0, 0, X) -> (ext/trunc X)
|
2017-05-19 18:20:44 +00:00 |
mul-i1024.ll
|
[DAGCombine] (addcarry 0, 0, X) -> (ext/trunc X)
|
2017-05-19 18:20:44 +00:00 |
mul-legalize.ll
|
…
|
|
mul-remat.ll
|
…
|
|
mul-shift-reassoc.ll
|
…
|
|
mul64.ll
|
…
|
|
mul128.ll
|
…
|
|
mul128_sext_loop.ll
|
…
|
|
muloti.ll
|
…
|
|
mult-alt-generic-i686.ll
|
…
|
|
mult-alt-generic-x86_64.ll
|
…
|
|
mult-alt-x86.ll
|
…
|
|
multiple-loop-post-inc.ll
|
…
|
|
multiple-return-values-cross-block.ll
|
…
|
|
mulx32.ll
|
[X86][BMI2] Regenerate mulx tests
|
2017-02-09 17:54:51 +00:00 |
mulx64.ll
|
[X86][BMI2] Regenerate mulx tests
|
2017-02-09 17:54:51 +00:00 |
musttail-fastcall.ll
|
…
|
|
musttail-indirect.ll
|
…
|
|
musttail-thiscall.ll
|
…
|
|
musttail-varargs.ll
|
…
|
|
musttail.ll
|
…
|
|
mwaitx.ll
|
…
|
|
named-reg-alloc.ll
|
…
|
|
named-reg-notareg.ll
|
…
|
|
nancvt.ll
|
…
|
|
narrow-shl-cst.ll
|
…
|
|
narrow-shl-load.ll
|
…
|
|
narrow_op-1.ll
|
…
|
|
neg-shl-add.ll
|
…
|
|
neg_cmp.ll
|
[x86] clean up setcc with negated operand transform and add missing test; NFCI
|
2017-03-17 20:29:40 +00:00 |
neg_fp.ll
|
…
|
|
negate-add-zero.ll
|
…
|
|
negate-i1.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
negate-shift.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
negate.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
negative-offset.ll
|
…
|
|
negative-sin.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
negative-stride-fptosi-user.ll
|
…
|
|
negative-subscript.ll
|
…
|
|
negative_zero.ll
|
…
|
|
new-remat.ll
|
…
|
|
newline-and-quote.ll
|
…
|
|
no-and8ri8.ll
|
…
|
|
no-cmov.ll
|
…
|
|
no-prolog-kill.ll
|
…
|
|
no-sse2-avg.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
nobt.ll
|
…
|
|
nocx16.ll
|
…
|
|
non-lazy-bind.ll
|
…
|
|
non-unique-sections.ll
|
…
|
|
non-value-mem-operand.mir
|
[ImplicitNullChecks] Uphold an invariant in areMemoryOpsAliased
|
2017-06-21 06:38:23 +00:00 |
nonconst-static-ev.ll
|
…
|
|
nonconst-static-iv.ll
|
…
|
|
nontemporal-2.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
nontemporal-loads.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
nontemporal.ll
|
Elide stores which are overwritten without being observed.
|
2017-05-16 19:43:56 +00:00 |
noreturn-call.ll
|
…
|
|
norex-subreg.ll
|
…
|
|
nosse-error1.ll
|
…
|
|
nosse-error2.ll
|
…
|
|
nosse-varargs.ll
|
…
|
|
nosse-vector.ll
|
…
|
|
not-and-simplify.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
note-sections.ll
|
…
|
|
null-streamer.ll
|
…
|
|
objc-gc-module-flags.ll
|
…
|
|
object-size.ll
|
…
|
|
oddshuffles.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
opaque-constant-asm.ll
|
…
|
|
opt-ext-uses.ll
|
…
|
|
opt-shuff-tstore.ll
|
…
|
|
optimize-max-0.ll
|
…
|
|
optimize-max-1.ll
|
[x86] update test to use FileCheck and auto-generate checks; NFC
|
2017-07-02 15:15:18 +00:00 |
optimize-max-2.ll
|
[x86] remove unnecessary RUN for test after auto-generating checks; NFC
|
2017-07-02 15:16:17 +00:00 |
optimize-max-3.ll
|
…
|
|
or-address.ll
|
…
|
|
or-branch.ll
|
Update expected result for or-branch.ll . NFC
|
2017-05-23 05:42:54 +00:00 |
or-lea.ll
|
…
|
|
osx-private-labels.ll
|
…
|
|
overflow.ll
|
[DAGCombine] (addcarry 0, 0, X) -> (ext/trunc X)
|
2017-05-19 18:20:44 +00:00 |
overlap-shift.ll
|
…
|
|
packed_struct.ll
|
…
|
|
packss.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
palignr.ll
|
[X86][SSE] Dropped -mcpu from palignr tests
|
2017-06-29 11:13:39 +00:00 |
partial-fold32.ll
|
…
|
|
partial-fold64.ll
|
…
|
|
pass-three.ll
|
…
|
|
patchable-prologue.ll
|
…
|
|
patchpoint-invoke.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
patchpoint-verifiable.mir
|
…
|
|
patchpoint-webkit_jscc.ll
|
…
|
|
patchpoint.ll
|
…
|
|
peep-setb.ll
|
[x86] don't blindly transform SETB into SBB
|
2017-03-12 18:28:48 +00:00 |
peep-test-0.ll
|
…
|
|
peep-test-1.ll
|
…
|
|
peep-test-2.ll
|
…
|
|
peep-test-3.ll
|
…
|
|
peep-test-4.ll
|
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC
|
2017-02-10 17:57:48 +00:00 |
peephole-cvt-sse.ll
|
…
|
|
peephole-fold-movsd.ll
|
…
|
|
peephole-multiple-folds.ll
|
…
|
|
peephole-na-phys-copy-folding.ll
|
…
|
|
peephole-recurrence.mir
|
Remove redundant copy in recurrences
|
2017-06-29 23:11:24 +00:00 |
peephole.mir
|
PeepholeOptimizer: Do not replace SubregToReg(bitcast like)
|
2017-01-09 21:38:17 +00:00 |
personality.ll
|
…
|
|
personality_size.ll
|
…
|
|
phaddsub.ll
|
[X86] Don't allow commuting to form phsub operations.
|
2017-01-21 06:59:38 +00:00 |
phi-bit-propagation.ll
|
…
|
|
phi-immediate-factoring.ll
|
…
|
|
phielim-split.ll
|
…
|
|
phys-reg-local-regalloc.ll
|
…
|
|
phys_subreg_coalesce-2.ll
|
…
|
|
phys_subreg_coalesce-3.ll
|
…
|
|
phys_subreg_coalesce.ll
|
…
|
|
pic-load-remat.ll
|
…
|
|
pic.ll
|
…
|
|
pic_jumptable.ll
|
…
|
|
pie.ll
|
…
|
|
pku.ll
|
…
|
|
pmovext.ll
|
…
|
|
pmovsx-inreg.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
pmul.ll
|
[X86][AVX] Regenerate tests with constant broadcast comments
|
2017-07-16 11:43:16 +00:00 |
pmulld.ll
|
…
|
|
pointer-vector.ll
|
[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.
|
2017-02-05 18:33:24 +00:00 |
pop-stack-cleanup.ll
|
…
|
|
popcnt-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
popcnt.ll
|
…
|
|
post-ra-sched-with-debug.mir
|
Resubmit r301309: [DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler.
|
2017-04-25 15:39:57 +00:00 |
post-ra-sched.ll
|
…
|
|
postalloc-coalescing.ll
|
…
|
|
postra-licm.ll
|
…
|
|
powi.ll
|
…
|
|
pr1462.ll
|
…
|
|
pr1489.ll
|
…
|
|
pr1505.ll
|
…
|
|
pr1505b.ll
|
…
|
|
pr2177.ll
|
…
|
|
pr2182.ll
|
…
|
|
pr2326.ll
|
…
|
|
pr2585.ll
|
…
|
|
pr2656.ll
|
[X86] Regenerate scalar stack reload test
|
2017-02-15 16:48:45 +00:00 |
pr2659.ll
|
…
|
|
pr2849.ll
|
…
|
|
pr2924.ll
|
…
|
|
pr2982.ll
|
…
|
|
pr3154.ll
|
…
|
|
pr3216.ll
|
…
|
|
pr3241.ll
|
…
|
|
pr3243.ll
|
…
|
|
pr3244.ll
|
…
|
|
pr3250.ll
|
…
|
|
pr3317.ll
|
…
|
|
pr3366.ll
|
…
|
|
pr3457.ll
|
…
|
|
pr3522.ll
|
…
|
|
pr5145.ll
|
…
|
|
pr7882.ll
|
…
|
|
pr9127.ll
|
…
|
|
pr9743.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
pr10068.ll
|
…
|
|
pr10475.ll
|
…
|
|
pr10499.ll
|
…
|
|
pr10523.ll
|
…
|
|
pr10524.ll
|
…
|
|
pr10525.ll
|
…
|
|
pr10526.ll
|
…
|
|
pr11202.ll
|
…
|
|
pr11334.ll
|
[X86][SSE] Allow matchVectorShuffleWithUNPCK to recognise ZERO inputs
|
2017-02-15 11:46:15 +00:00 |
pr11415.ll
|
…
|
|
pr11468.ll
|
…
|
|
pr11985.ll
|
…
|
|
pr11998.ll
|
…
|
|
pr12312.ll
|
[x86] regenerate checks; NFC
|
2017-03-17 22:47:21 +00:00 |
pr12360.ll
|
…
|
|
pr12889.ll
|
…
|
|
pr13209.ll
|
…
|
|
pr13220.ll
|
…
|
|
pr13458.ll
|
…
|
|
pr13577.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
pr13859.ll
|
…
|
|
pr13899.ll
|
…
|
|
pr14088.ll
|
…
|
|
pr14098.ll
|
…
|
|
pr14161.ll
|
…
|
|
pr14204.ll
|
[X86][AVX2] Removed FIXME comment and regenerated test.
|
2017-01-24 16:56:23 +00:00 |
pr14314.ll
|
Autogenerate results for test/CodeGen/X86/pr14314.ll . NFC
|
2017-02-10 17:57:46 +00:00 |
pr14333.ll
|
…
|
|
pr14562.ll
|
…
|
|
pr15267.ll
|
…
|
|
pr15296.ll
|
…
|
|
pr15309.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-02 15:24:08 +00:00 |
pr15705.ll
|
[X86] Add test case for PR15705
|
2017-06-25 16:12:45 +00:00 |
pr15981.ll
|
[X86] Add test case for PR15981
|
2017-06-26 15:53:11 +00:00 |
pr16031.ll
|
Use autogenerate check in CodeGen/X86/pr16031.ll . NFC
|
2017-02-10 17:26:21 +00:00 |
pr16360.ll
|
…
|
|
pr16807.ll
|
…
|
|
pr17546.ll
|
…
|
|
pr17631.ll
|
…
|
|
pr17764.ll
|
[X86][AVX2] Regenerate test.
|
2017-01-24 16:58:22 +00:00 |
pr18014.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
pr18054.ll
|
…
|
|
pr18162.ll
|
…
|
|
pr18344.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
pr18846.ll
|
…
|
|
pr19049.ll
|
…
|
|
pr20020.ll
|
…
|
|
pr20088.ll
|
…
|
|
pr21099.ll
|
…
|
|
pr21792.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
pr22019.ll
|
…
|
|
pr22103.ll
|
…
|
|
pr22338.ll
|
[X86] Add PR22338 test case
|
2017-03-16 15:10:42 +00:00 |
pr22774.ll
|
…
|
|
pr22970.ll
|
[X86] Added pointer math zext test case (PR22970)
|
2017-04-26 13:03:00 +00:00 |
pr23103.ll
|
…
|
|
pr23246.ll
|
…
|
|
pr23273.ll
|
…
|
|
pr23603.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-02 15:24:08 +00:00 |
pr23664.ll
|
…
|
|
pr24139.ll
|
…
|
|
pr24374.ll
|
…
|
|
pr24602.ll
|
…
|
|
pr25828.ll
|
…
|
|
pr26350.ll
|
[x86] don't blindly transform SETB into SBB
|
2017-03-12 18:28:48 +00:00 |
pr26625.ll
|
…
|
|
pr26652.ll
|
…
|
|
pr26757.ll
|
…
|
|
pr26835.ll
|
…
|
|
pr26870.ll
|
…
|
|
pr27071.ll
|
…
|
|
pr27501.ll
|
…
|
|
pr27591.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
pr27681.mir
|
ScheduleDAGInstrs: Fix fixupKills()
|
2017-05-27 02:50:50 +00:00 |
pr28129.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
pr28173.ll
|
[X86][AVX512] Make i1 illegal in the CodeGen
|
2017-05-19 12:35:15 +00:00 |
pr28444.ll
|
…
|
|
pr28472.ll
|
…
|
|
pr28489.ll
|
…
|
|
pr28504.ll
|
…
|
|
pr28515.ll
|
…
|
|
pr28560.ll
|
…
|
|
pr28824.ll
|
…
|
|
pr29010.ll
|
…
|
|
pr29022.ll
|
…
|
|
pr29112.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
pr29170.ll
|
Regen expected tests result. NFC
|
2017-02-11 19:27:15 +00:00 |
pr30284.ll
|
[X86] Generate VZEROUPPER for Skylake-avx512.
|
2017-03-03 09:03:24 +00:00 |
pr30430.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
pr30511.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
pr30562.ll
|
Test commit.
|
2017-05-15 13:14:04 +00:00 |
pr30813.ll
|
…
|
|
pr31088.ll
|
Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."
|
2017-05-18 18:50:05 +00:00 |
pr31143.ll
|
…
|
|
pr31242.ll
|
…
|
|
pr31271.ll
|
…
|
|
pr31323.ll
|
…
|
|
pr31773.ll
|
[X86 Codegen] Fixed a bug in unsigned saturation
|
2017-01-29 13:18:30 +00:00 |
pr31956.ll
|
[DAG] Don't try to create an INSERT_SUBVECTOR with an illegal source
|
2017-02-15 18:37:26 +00:00 |
pr32108.ll
|
Regenerate test with codegen. NFCI.
|
2017-04-02 14:21:14 +00:00 |
pr32241.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
pr32256.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
pr32278.ll
|
Second attempt for fix Hexagon buildbot by moving test to under X86/
|
2017-03-15 21:13:45 +00:00 |
pr32282.ll
|
[X86] Add test case for PR32282
|
2017-07-18 10:09:40 +00:00 |
pr32284.ll
|
[SDAG] Fix CombineTo ordering in visitZERO_EXTEND and visitSIGN_EXTEND
|
2017-06-01 19:33:50 +00:00 |
pr32329.ll
|
[X86] Use SARX/SHLX/SHLX instructions for (shift x (and y, (BitWidth-1)))
|
2017-07-20 06:19:55 +00:00 |
pr32340.ll
|
[SDAG] Avoid deleted SDNodes PromoteIntBinOp
|
2017-03-28 15:41:12 +00:00 |
pr32345.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
pr32368.ll
|
[X86][SSE] Extended PR32368 to SSE/AVX1/AVX2
|
2017-06-10 21:13:01 +00:00 |
pr32420.ll
|
[SDAG] Deal with deleted node in PromoteIntShiftOp
|
2017-03-28 17:09:49 +00:00 |
pr32451.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
pr32484.ll
|
[DAGCombiner] Fix fold (or (shuf A, V_0, MA), (shuf B, V_0, MB)) -> (shuf A, B, Mask) to explicitly ensure that only one of the inputs of each shuffle is a zero vector.
|
2017-04-01 04:26:20 +00:00 |
pr32515.ll
|
[DAG] Avoid deleting nodes before combining them.
|
2017-07-18 17:39:15 +00:00 |
pr32588.ll
|
[X86] Create the correct ADC/SBB SDNode when lowering add.
|
2017-04-11 19:11:20 +00:00 |
pr32610.ll
|
[ScheduleDAG] Deal with already scheduled loads in ScheduleDAG.
|
2017-05-31 18:43:17 +00:00 |
pr32659.ll
|
Prevent RemoveDeadNodes from deleted already deleted node.
|
2017-06-09 12:57:35 +00:00 |
pr32907.ll
|
[X86][SSE42] Lower v2i64/v4i64 ASHR(X, 63) as PCMPGTQ(0, X)
|
2017-05-09 13:14:40 +00:00 |
pr33290.ll
|
[X86] Add test case for PR33290
|
2017-07-28 09:43:52 +00:00 |
pr33396.ll
|
[SelectionDAG] Update Loop info after splitting critical edges.
|
2017-06-17 00:56:27 +00:00 |
pr33715.ll
|
[X86] Relax an assertion when legalizing vector types.
|
2017-07-09 19:22:48 +00:00 |
pr33772.ll
|
[x86] Add a missing triple, without which the CPU won't parse.
|
2017-07-18 08:16:32 +00:00 |
pr33828.ll
|
[DAGCombine] Fix issue with out of bound constant rotation (PR33828)
|
2017-07-18 12:31:46 +00:00 |
pr33844.ll
|
[X86] Don't try to scale down if that exceeds the bitwidth.
|
2017-07-19 18:09:46 +00:00 |
pr33960.ll
|
[SelectionDAG] Improve DAGTypeLegalizer::convertMask assertion (PR33960)
|
2017-07-27 18:15:54 +00:00 |
pre-coalesce-2.ll
|
[RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
|
2017-01-28 01:05:27 +00:00 |
pre-coalesce.ll
|
[RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
|
2017-01-28 01:05:27 +00:00 |
pre-coalesce.mir
|
MIParser/MIRPrinter: Compute block successors if not explicitely specified
|
2017-05-05 21:09:30 +00:00 |
pre-ra-sched.ll
|
…
|
|
prefetch.ll
|
…
|
|
prefixdata.ll
|
Ensure that prefix data is preserved with subsections-via-symbols
|
2017-03-15 04:18:16 +00:00 |
preserve_allcc64.ll
|
…
|
|
preserve_mostcc64.ll
|
…
|
|
private-2.ll
|
…
|
|
private.ll
|
…
|
|
prolog-push-seq.ll
|
…
|
|
prologue-epilogue-remarks.mir
|
[PEI] Add basic opt-remarks support
|
2017-07-19 23:47:32 +00:00 |
prologuedata.ll
|
…
|
|
promote-assert-zext.ll
|
…
|
|
promote-i16.ll
|
…
|
|
promote-trunc.ll
|
…
|
|
promote-vec3.ll
|
[X86][SSE] Attempt to extract vector elements through target shuffles
|
2017-02-27 21:01:57 +00:00 |
promote.ll
|
…
|
|
ps4-noreturn.ll
|
…
|
|
pseudo_cmov_lower.ll
|
…
|
|
pseudo_cmov_lower1.ll
|
…
|
|
pseudo_cmov_lower2.ll
|
…
|
|
pshufb-mask-comments.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
pshufd-combine-crash.ll
|
…
|
|
psubus.ll
|
[x86] Update tests in psubus.ll; NFC
|
2017-05-17 13:39:16 +00:00 |
ptr-rotate.ll
|
…
|
|
ptrtoint-constexpr.ll
|
…
|
|
push-cfi-debug.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
push-cfi-obj.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
push-cfi.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
ragreedy-bug.ll
|
…
|
|
ragreedy-hoist-spill.ll
|
…
|
|
ragreedy-last-chance-recoloring.ll
|
…
|
|
rd-mod-wr-eflags.ll
|
…
|
|
rdpmc.ll
|
…
|
|
rdrand-x86_64.ll
|
[X86][RDRAND] Split off i64 intrinsic tests and test i16/i32 on 32-bit target as well.
|
2017-07-01 16:41:12 +00:00 |
rdrand.ll
|
[X86][RDRAND] Split off i64 intrinsic tests and test i16/i32 on 32-bit target as well.
|
2017-07-01 16:41:12 +00:00 |
rdseed-x86_64.ll
|
[X86][RDSEED] Split off i64 intrinsic tests and test i16/i32 on 32-bit target as well.
|
2017-07-01 16:42:16 +00:00 |
rdseed.ll
|
[X86][RDSEED] Split off i64 intrinsic tests and test i16/i32 on 32-bit target as well.
|
2017-07-01 16:42:16 +00:00 |
rdtsc.ll
|
…
|
|
read-fp-no-frame-pointer.ll
|
…
|
|
recip-fastmath.ll
|
[X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler Part-1 (PR28573).
|
2017-07-10 16:36:03 +00:00 |
recip-fastmath2.ll
|
[X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler Part-1 (PR28573).
|
2017-07-10 16:36:03 +00:00 |
recip-pic.ll
|
Added special test covering a problem with PIC relocation model on SLM architecture. The fix will come in D26855.
|
2017-03-02 13:47:03 +00:00 |
red-zone.ll
|
…
|
|
red-zone2.ll
|
…
|
|
reduce-trunc-shl.ll
|
[X86] In LowerTRUNCATE, create an ISD::VECTOR_SHUFFLE instead of explicitly creating a PSHUFB. This will be lowered by regular shuffle lowering to a PSHUFB later.
|
2017-02-05 18:33:14 +00:00 |
regalloc-reconcile-broken-hints.ll
|
[LSR] Narrow search space by filtering non-optimal formulae with the same ScaledReg and Scale.
|
2017-07-06 15:52:14 +00:00 |
regalloc-spill-at-ehpad.ll
|
…
|
|
regcall-no-plt.ll
|
[X86] Disabling PLT in Regcall CC Functions
|
2017-05-04 07:22:49 +00:00 |
reghinting.ll
|
…
|
|
regparm.ll
|
[llvm] Remove redundant check-prefix=CHECK from tests. NFC.
|
2017-07-17 17:32:45 +00:00 |
regpressure.ll
|
…
|
|
rem.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
rem_crash.ll
|
…
|
|
remat-constant.ll
|
…
|
|
remat-fold-load.ll
|
…
|
|
remat-mov-0.ll
|
…
|
|
remat-phys-dead.ll
|
…
|
|
remat-scalar-zero.ll
|
…
|
|
replace_unsupported_masked_mem_intrin.ll
|
[X86] Relocate code of replacement of subtarget unsupported masked memory intrinsics to run also on -O0 option.
|
2017-05-15 11:30:54 +00:00 |
ret-addr.ll
|
…
|
|
ret-i64-0.ll
|
…
|
|
ret-mmx.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
return-ext.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
return_zeroext_i2.ll
|
…
|
|
returned-trunc-tail-calls.ll
|
…
|
|
reverse_branches.ll
|
…
|
|
rip-rel-address.ll
|
…
|
|
rip-rel-lea.ll
|
…
|
|
rodata-relocs.ll
|
…
|
|
rot16.ll
|
…
|
|
rot32.ll
|
[X86] Use SHLD with both inputs from the same register to implement rotate on Sandy Bridge and later Intel CPUs
|
2017-02-21 06:39:13 +00:00 |
rot64.ll
|
[X86] Use SHLD with both inputs from the same register to implement rotate on Sandy Bridge and later Intel CPUs
|
2017-02-21 06:39:13 +00:00 |
rotate.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
rotate2.ll
|
…
|
|
rotate4.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-02 15:24:08 +00:00 |
rotate_vec.ll
|
[DAGCombiner] Recognise vector rotations with non-splat constants
|
2017-07-16 23:11:45 +00:00 |
rounding-ops.ll
|
…
|
|
rrlist-livereg-corrutpion.ll
|
…
|
|
rtm.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
sad.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
sad_variations.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
saddo-redundant-add.ll
|
…
|
|
safestack.ll
|
[Fuchsia] Use thread-pointer ABI slots for stack-protector and safe-stack
|
2017-02-24 03:10:10 +00:00 |
safestack_ssp.ll
|
[Fuchsia] Use thread-pointer ABI slots for stack-protector and safe-stack
|
2017-02-24 03:10:10 +00:00 |
sandybridge-loads.ll
|
[x86] auto-generate better checks; NFC
|
2017-05-28 13:57:59 +00:00 |
sar_fold.ll
|
…
|
|
sar_fold64.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
sbb.ll
|
[x86] improve SBB optimizations for SETB/SETA with subtract
|
2017-07-12 17:56:46 +00:00 |
scalar-extract.ll
|
…
|
|
scalar-fp-to-i64.ll
|
…
|
|
scalar-int-to-fp.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
scalar-min-max-fill-operand.ll
|
…
|
|
scalar_sse_minmax.ll
|
…
|
|
scalar_widen_div.ll
|
…
|
|
scalarize-bitcast.ll
|
…
|
|
scavenger.mir
|
RegScavenging: Add scavengeRegisterBackwards()
|
2017-06-17 02:08:18 +00:00 |
scev-interchange.ll
|
…
|
|
scheduler-backtracking.ll
|
…
|
|
sdiv-exact.ll
|
…
|
|
sdiv-pow2.ll
|
…
|
|
segmented-stacks-dynamic.ll
|
…
|
|
segmented-stacks.ll
|
…
|
|
seh-catch-all-win32.ll
|
…
|
|
seh-catch-all.ll
|
…
|
|
seh-catchpad.ll
|
…
|
|
seh-except-finally.ll
|
…
|
|
seh-exception-code.ll
|
…
|
|
seh-filter-no-personality.ll
|
…
|
|
seh-finally.ll
|
…
|
|
seh-no-invokes.ll
|
…
|
|
seh-safe-div-win32.ll
|
…
|
|
seh-safe-div.ll
|
…
|
|
seh-stack-realign.ll
|
…
|
|
select-with-and-or.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
select.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
select_const.ll
|
[x86] add select-of-constant tests; NFC
|
2017-07-12 22:42:39 +00:00 |
select_meta.ll
|
Fix some broken CHECK lines.
|
2017-01-22 20:28:56 +00:00 |
selectiondag-crash.ll
|
…
|
|
selectiondag-cse.ll
|
…
|
|
selectiondag-dominator.ll
|
[x86] Stop this test from dirtying the source tree when run.
|
2017-06-06 03:24:22 +00:00 |
selectiondag-order.ll
|
[DAG] Don't increase SDNodeOrder for dbg.value/declare.
|
2017-01-19 13:55:55 +00:00 |
setcc-combine.ll
|
[TargetLowering] fix isConstTrueVal to account for build vector truncation
|
2017-04-26 14:05:42 +00:00 |
setcc-logic.ll
|
[DAGCombiner] add and use TLI hook to convert and-of-seteq / or-of-setne to bitwise logic+setcc (PR32401)
|
2017-04-05 14:09:39 +00:00 |
setcc-lowering.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
setcc-narrowing.ll
|
[X86] Regenerate setcc tests
|
2017-07-26 16:45:57 +00:00 |
setcc-wide-types.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
setcc.ll
|
[x86] don't blindly transform SETB into SBB
|
2017-03-12 18:28:48 +00:00 |
setjmp-spills.ll
|
…
|
|
setoeq.ll
|
…
|
|
setuge.ll
|
…
|
|
sext-i1.ll
|
[x86] remove stale comments from tests; NFC
|
2017-02-18 21:07:37 +00:00 |
sext-load.ll
|
…
|
|
sext-ret-val.ll
|
…
|
|
sext-setcc-self.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
sext-subreg.ll
|
…
|
|
sext-trunc.ll
|
…
|
|
sha.ll
|
[X86] Fix printing of sha256rnds2 to include the implicit %xmm0 argument.
|
2017-02-05 18:33:31 +00:00 |
shift-and.ll
|
[X86] Allow masks with more than 6 bits set on the x << (y & mask) optimization for the 64-bit memory shifts.
|
2017-07-20 19:29:58 +00:00 |
shift-avx2-crash.ll
|
…
|
|
shift-bmi2.ll
|
[X86] Add patterns for memory forms of SARX/SHLX/SHRX with careful complexity adjustment to keep shift by immediate using the legacy instructions.
|
2017-07-23 03:59:37 +00:00 |
shift-coalesce.ll
|
…
|
|
shift-codegen.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 14:29:45 +00:00 |
shift-combine-crash.ll
|
…
|
|
shift-combine.ll
|
…
|
|
shift-double-x86_64.ll
|
…
|
|
shift-double.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
shift-folding.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 14:29:45 +00:00 |
shift-i128.ll
|
…
|
|
shift-i256.ll
|
…
|
|
shift-one.ll
|
…
|
|
shift-pair.ll
|
…
|
|
shift-parts.ll
|
…
|
|
shift-pcmp.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
shl-anyext.ll
|
…
|
|
shl-crash-on-legalize.ll
|
…
|
|
shl-i64.ll
|
…
|
|
shl_elim.ll
|
…
|
|
shl_undef.ll
|
…
|
|
shrink-compare.ll
|
Regenerate shrink-compare.ll test results. NFC
|
2017-06-02 14:02:43 +00:00 |
shrink-fp-const1.ll
|
…
|
|
shrink-fp-const2.ll
|
…
|
|
shrink-wrap-chkstk.ll
|
…
|
|
shrink_vmul.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
shrink_vmul_sse.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
shrinkwrap-hang.ll
|
…
|
|
shuffle-combine-crash-2.ll
|
[X86][SSE] Fixed shuffle MOVSS/MOVSD combining of all zeroable inputs
|
2017-03-15 13:16:46 +00:00 |
shuffle-combine-crash.ll
|
…
|
|
shuffle-of-splat-multiuses.ll
|
DAGCombine: Combine shuffles of splat-shuffles
|
2017-05-09 20:25:38 +00:00 |
shuffle-strided-with-offset-128.ll
|
[X86] Adding ISel tests for strided-shuffles with non-zero offset. NFC.
|
2017-07-20 21:03:36 +00:00 |
shuffle-strided-with-offset-256.ll
|
DAGCombiner: Extend reduceBuildVecToTrunc to handle non-zero offset
|
2017-07-26 12:57:03 +00:00 |
shuffle-strided-with-offset-512.ll
|
DAGCombiner: Extend reduceBuildVecToTrunc to handle non-zero offset
|
2017-07-26 12:57:03 +00:00 |
shuffle-vs-trunc-128.ll
|
[X86][SSE] Add SSE2/SSE42 shuffle truncation tests
|
2017-06-21 12:58:19 +00:00 |
shuffle-vs-trunc-256.ll
|
DAGCombine: Combine BUILD_VECTOR to TRUNCATE
|
2017-07-03 15:47:40 +00:00 |
shuffle-vs-trunc-512.ll
|
DAGCombine: Combine BUILD_VECTOR to TRUNCATE
|
2017-07-03 15:47:40 +00:00 |
sibcall-2.ll
|
…
|
|
sibcall-3.ll
|
…
|
|
sibcall-4.ll
|
…
|
|
sibcall-5.ll
|
…
|
|
sibcall-6.ll
|
…
|
|
sibcall-byval.ll
|
…
|
|
sibcall-win64.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
sibcall.ll
|
…
|
|
simple-zext.ll
|
…
|
|
sincos-opt.ll
|
[CodeGen][X86] Fuchsia supports sincos* libcalls and sin+cos->sincos optimization
|
2017-07-23 22:30:00 +00:00 |
sincos.ll
|
…
|
|
sink-blockfreq.ll
|
fix trivial typos; NFC
|
2017-07-09 05:54:44 +00:00 |
sink-cheap-instructions.ll
|
…
|
|
sink-gep-before-mem-inst.ll
|
[CGP] Relax a bit restriction for optimizeMemoryInst to extend scope
|
2017-07-11 06:24:44 +00:00 |
sink-hoist.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
sink-out-of-loop.ll
|
…
|
|
sjlj-baseptr.ll
|
…
|
|
sjlj-eh.ll
|
…
|
|
sjlj.ll
|
…
|
|
slow-incdec.ll
|
…
|
|
slow-pmulld.ll
|
Remove an overeager assert from r288844.
|
2017-01-17 19:29:15 +00:00 |
slow-unaligned-mem.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
small-byval-memcpy.ll
|
…
|
|
smul-with-overflow.ll
|
…
|
|
soft-fp-legal-in-HW-reg.ll
|
[legalize-types] Clean up softening machinery.
|
2017-07-04 01:08:55 +00:00 |
soft-fp.ll
|
…
|
|
soft-sitofp.ll
|
…
|
|
splat-const.ll
|
…
|
|
splat-for-size.ll
|
[x86] adjust test constants to maintain coverage; NFC
|
2017-06-18 14:01:32 +00:00 |
split-eh-lpad-edges.ll
|
…
|
|
split-extend-vector-inreg.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
split-store.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
split-vector-bitcast.ll
|
…
|
|
split-vector-rem.ll
|
…
|
|
sqrt-fastmath-mir.ll
|
…
|
|
sqrt-fastmath-tune.ll
|
…
|
|
sqrt-fastmath.ll
|
…
|
|
sqrt.ll
|
…
|
|
sret-implicit.ll
|
…
|
|
sse-align-0.ll
|
…
|
|
sse-align-1.ll
|
…
|
|
sse-align-2.ll
|
…
|
|
sse-align-3.ll
|
…
|
|
sse-align-4.ll
|
…
|
|
sse-align-5.ll
|
…
|
|
sse-align-6.ll
|
…
|
|
sse-align-7.ll
|
…
|
|
sse-align-8.ll
|
…
|
|
sse-align-9.ll
|
…
|
|
sse-align-10.ll
|
Update test/CodeGen/X86/sse-align-10.ll to use FileCheck instead of grep
|
2017-02-10 01:35:31 +00:00 |
sse-align-11.ll
|
…
|
|
sse-align-12.ll
|
…
|
|
sse-commute.ll
|
…
|
|
sse-domains.ll
|
…
|
|
sse-fcopysign.ll
|
…
|
|
sse-fsignum.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
sse-intel-ocl.ll
|
…
|
|
sse-intrinsics-fast-isel-x86_64.ll
|
…
|
|
sse-intrinsics-fast-isel.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
sse-intrinsics-x86-upgrade.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
sse-intrinsics-x86.ll
|
[AVX-512] Allow legacy scalar min/max intrinsics to select EVEX instructions when available
|
2017-02-22 06:54:18 +00:00 |
sse-intrinsics-x86_64.ll
|
[X86][AVX512] Add missing entries to EVEX2VEX tables
|
2017-03-07 08:05:53 +00:00 |
sse-load-ret.ll
|
…
|
|
sse-minmax.ll
|
[X86] Fix execution domain for cmpss/sd instructions.
|
2017-02-26 06:45:59 +00:00 |
sse-only.ll
|
…
|
|
sse-regcall.ll
|
Disable Callee Saved Registers
|
2017-03-14 09:09:26 +00:00 |
sse-scalar-fp-arith-unary.ll
|
…
|
|
sse-scalar-fp-arith.ll
|
[X86][SSE] Dropped -mcpu from scalar math tests
|
2017-06-23 13:07:20 +00:00 |
sse-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
sse-unaligned-mem-feature.ll
|
…
|
|
sse-varargs.ll
|
…
|
|
sse1.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
sse2-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
sse2-intrinsics-fast-isel.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
sse2-intrinsics-x86-upgrade.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
sse2-intrinsics-x86.ll
|
[X86] Fix the execution domain for scalar SQRT intrinsic instruction.
|
2017-02-26 06:45:35 +00:00 |
sse2-intrinsics-x86_64.ll
|
[X86][AVX512] Add missing entries to EVEX2VEX tables
|
2017-03-07 08:05:53 +00:00 |
sse2-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
sse2-vector-shifts.ll
|
…
|
|
sse2.ll
|
[X86][SSE] Check SSE2/SSE3 codegen tests on i686 and x86_64
|
2017-06-26 18:20:46 +00:00 |
sse3-avx-addsub-2.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
sse3-avx-addsub.ll
|
Fix blend mask by switch the side of the operand since Blend node uses opposite mask then Select NODE.
|
2017-01-15 16:43:14 +00:00 |
sse3-intrinsics-fast-isel.ll
|
…
|
|
sse3-intrinsics-x86.ll
|
[X86] Remove sse3 intrinsic tests from the avx intrinsics test file.
|
2017-02-21 08:05:59 +00:00 |
sse3-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
sse3.ll
|
[X86][SSE] Check SSE2/SSE3 codegen tests on i686 and x86_64
|
2017-06-26 18:20:46 +00:00 |
sse4a-intrinsics-fast-isel.ll
|
…
|
|
sse4a-schedule.ll
|
This patch returns proper value to indicate the case when instruction throughput can't be calculated.
|
2017-07-26 18:55:14 +00:00 |
sse4a-upgrade.ll
|
…
|
|
sse4a.ll
|
…
|
|
sse41-intrinsics-fast-isel.ll
|
[x86] don't blindly transform SETB into SBB
|
2017-03-12 18:28:48 +00:00 |
sse41-intrinsics-x86-upgrade.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
sse41-intrinsics-x86.ll
|
[x86] don't blindly transform SETB into SBB
|
2017-03-12 18:28:48 +00:00 |
sse41-pmovxrm.ll
|
…
|
|
sse41-schedule.ll
|
This patch returns proper value to indicate the case when instruction throughput can't be calculated.
|
2017-07-26 18:55:14 +00:00 |
sse41.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
sse42-intrinsics-fast-isel-x86_64.ll
|
…
|
|
sse42-intrinsics-fast-isel.ll
|
[x86] Revert the X86FoldTablesEmitter due to more miscompiles.
|
2017-06-06 02:15:31 +00:00 |
sse42-intrinsics-x86.ll
|
[x86] don't blindly transform SETB into SBB
|
2017-03-12 18:28:48 +00:00 |
sse42-intrinsics-x86_64.ll
|
[X86] Remove sse4.2 intrinsic tests from the avx intrinsics test file. Fix some other consistency issues.
|
2017-02-21 08:06:05 +00:00 |
sse42-schedule.ll
|
This patch returns proper value to indicate the case when instruction throughput can't be calculated.
|
2017-07-26 18:55:14 +00:00 |
sse_partial_update.ll
|
…
|
|
sse_reload_fold.ll
|
…
|
|
ssp-data-layout.ll
|
…
|
|
ssp-guard-spill.ll
|
…
|
|
ssse3-intrinsics-fast-isel.ll
|
…
|
|
ssse3-intrinsics-x86.ll
|
[X86] Remove ssse3 intrinsic tests from the avx intrinsics test file.
|
2017-02-21 08:06:08 +00:00 |
ssse3-schedule.ll
|
AMD znver1 Initial Scheduler model
|
2017-07-19 02:45:14 +00:00 |
stack-align-memcpy.ll
|
…
|
|
stack-align.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
stack-align2.ll
|
…
|
|
stack-folding-3dnow.ll
|
…
|
|
stack-folding-adx-x86_64.ll
|
[X86] Add subborrow stack folding tests
|
2017-02-17 21:16:24 +00:00 |
stack-folding-bmi.ll
|
[X86][BMI] Add BMI stack folding tests
|
2017-02-17 17:11:00 +00:00 |
stack-folding-bmi2.ll
|
[X86][BMI] Add BMI2 stack folding tests
|
2017-02-17 18:00:43 +00:00 |
stack-folding-fp-avx1.ll
|
[x86] Revert the X86FoldTablesEmitter due to more miscompiles.
|
2017-06-06 02:15:31 +00:00 |
stack-folding-fp-avx512.ll
|
…
|
|
stack-folding-fp-avx512vl.ll
|
[AVX-512] Add VSHUFPS/PD to load folding tables.
|
2017-02-06 03:17:58 +00:00 |
stack-folding-fp-sse42.ll
|
[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.
|
2017-02-05 18:33:24 +00:00 |
stack-folding-int-avx1.ll
|
…
|
|
stack-folding-int-avx2.ll
|
…
|
|
stack-folding-int-avx512.ll
|
[AVX-512] Mark masked VPCMP instructions as commutable.
|
2017-06-13 07:13:50 +00:00 |
stack-folding-int-avx512vl.ll
|
[AVX-512] Add VPCONFLICT and VPLZCNT to load folding tables.
|
2017-06-12 04:57:31 +00:00 |
stack-folding-int-sse42.ll
|
[x86] Add the test for folding stack spills into pextrw.
|
2017-06-06 02:16:01 +00:00 |
stack-folding-lwp.ll
|
[X86][LWP] Add stack folding mappings and tests for LWPINS/LWPVAL instructions
|
2017-05-03 16:46:30 +00:00 |
stack-folding-mmx.ll
|
…
|
|
stack-folding-sha.ll
|
[X86][SHA] Add SHA stack folding tests
|
2017-02-17 19:24:55 +00:00 |
stack-folding-tbm.ll
|
[X86][TBM] Add TBM stack folding tests
|
2017-02-17 18:51:53 +00:00 |
stack-folding-x86_64.ll
|
…
|
|
stack-folding-xop.ll
|
…
|
|
stack-probe-red-zone.ll
|
[X86] Add support for "probe-stack" attribute
|
2017-06-22 15:42:53 +00:00 |
stack-probe-size.ll
|
…
|
|
stack-probes.ll
|
[X86] Add support for "probe-stack" attribute
|
2017-06-22 15:42:53 +00:00 |
stack-protector-dbginfo.ll
|
Remove line and file from DINamespace.
|
2017-04-28 22:25:46 +00:00 |
stack-protector-msvc.ll
|
…
|
|
stack-protector-remarks.ll
|
[SSP] In opt remarks, stream Function directly
|
2017-03-09 06:10:27 +00:00 |
stack-protector-target.ll
|
Disable TLS for stack protector on Android API<17.
|
2017-02-23 21:06:35 +00:00 |
stack-protector-vreg-to-vreg-copy.ll
|
…
|
|
stack-protector-weight.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
stack-protector.ll
|
…
|
|
stack-update-frame-opcode.ll
|
…
|
|
stack_guard_remat.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
stackguard-internal.ll
|
…
|
|
stackmap-fast-isel.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
stackmap-frame-setup.ll
|
Add extra operand to CALLSEQ_START to keep frame part set up previously
|
2017-05-09 13:35:13 +00:00 |
stackmap-large-constants.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
stackmap-large-location-size.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
stackmap-liveness.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
stackmap-nops.ll
|
…
|
|
stackmap-shadow-optimization.ll
|
…
|
|
stackmap.ll
|
[StackMaps] Increase the size of the "location size" field
|
2017-04-28 04:48:42 +00:00 |
stackpointer.ll
|
…
|
|
statepoint-allocas.ll
|
Add placeholder for more extensive verification of psuedo ops
|
2017-06-02 16:36:37 +00:00 |
statepoint-call-lowering.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
statepoint-far-call.ll
|
Add placeholder for more extensive verification of psuedo ops
|
2017-06-02 16:36:37 +00:00 |
statepoint-forward.ll
|
Add placeholder for more extensive verification of psuedo ops
|
2017-06-02 16:36:37 +00:00 |
statepoint-gctransition-call-lowering.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
statepoint-invoke.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
statepoint-live-in.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
statepoint-stack-usage.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
statepoint-stackmap-format.ll
|
Add placeholder for more extensive verification of psuedo ops
|
2017-06-02 16:36:37 +00:00 |
statepoint-uniqueing.ll
|
Add placeholder for more extensive verification of psuedo ops
|
2017-06-02 16:36:37 +00:00 |
statepoint-vector-bad-spill.ll
|
Add placeholder for more extensive verification of psuedo ops
|
2017-06-02 16:36:37 +00:00 |
statepoint-vector.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
stdarg.ll
|
…
|
|
stdcall-notailcall.ll
|
…
|
|
stdcall.ll
|
…
|
|
store-empty-member.ll
|
…
|
|
store-fp-constant.ll
|
…
|
|
store-global-address.ll
|
…
|
|
store-narrow.ll
|
Elide stores which are overwritten without being observed.
|
2017-05-16 19:43:56 +00:00 |
store-zero-and-minus-one.ll
|
…
|
|
store_op_load_fold.ll
|
…
|
|
store_op_load_fold2.ll
|
…
|
|
stores-merging.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
storetrunc-fp.ll
|
…
|
|
stride-nine-with-base-reg.ll
|
…
|
|
stride-reuse.ll
|
…
|
|
sub-with-overflow.ll
|
…
|
|
sub.ll
|
…
|
|
subcarry.ll
|
Add a test case for large integer subtraction via subcarry. NFC
|
2017-05-22 06:06:45 +00:00 |
subreg-to-reg-0.ll
|
…
|
|
subreg-to-reg-1.ll
|
…
|
|
subreg-to-reg-2.ll
|
…
|
|
subreg-to-reg-3.ll
|
…
|
|
subreg-to-reg-4.ll
|
…
|
|
subreg-to-reg-6.ll
|
…
|
|
subvector-broadcast.ll
|
[X86][AVX512] Add missing entries to EVEX2VEX tables
|
2017-03-07 08:05:53 +00:00 |
sunkaddr-ext.ll
|
…
|
|
swift-return.ll
|
Elide stores which are overwritten without being observed.
|
2017-05-16 19:43:56 +00:00 |
swifterror.ll
|
ISel: Fix FastISel of swifterror values
|
2017-06-15 17:34:42 +00:00 |
swiftself.ll
|
…
|
|
switch-bt.ll
|
…
|
|
switch-crit-edge-constant.ll
|
…
|
|
switch-default-only.ll
|
…
|
|
switch-density.ll
|
…
|
|
switch-edge-weight.ll
|
…
|
|
switch-jump-table.ll
|
…
|
|
switch-or.ll
|
…
|
|
switch-order-weight.ll
|
…
|
|
switch-zextload.ll
|
…
|
|
switch.ll
|
…
|
|
swizzle-2.ll
|
…
|
|
swizzle-avx2.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 14:29:45 +00:00 |
system-intrinsics-64-xsave.ll
|
…
|
|
system-intrinsics-64-xsavec.ll
|
…
|
|
system-intrinsics-64-xsaveopt.ll
|
…
|
|
system-intrinsics-64-xsaves.ll
|
…
|
|
system-intrinsics-64.ll
|
…
|
|
system-intrinsics-xgetbv.ll
|
…
|
|
system-intrinsics-xsave.ll
|
…
|
|
system-intrinsics-xsavec.ll
|
…
|
|
system-intrinsics-xsaveopt.ll
|
…
|
|
system-intrinsics-xsaves.ll
|
…
|
|
system-intrinsics-xsetbv.ll
|
…
|
|
system-intrinsics.ll
|
…
|
|
tail-call-attrs.ll
|
…
|
|
tail-call-casts.ll
|
…
|
|
tail-call-conditional.mir
|
[X86] Re-enable conditional tail calls and fix PR31257.
|
2017-02-16 00:04:05 +00:00 |
tail-call-got.ll
|
…
|
|
tail-call-legality.ll
|
…
|
|
tail-call-mutable-memarg.ll
|
[X86] Fix latent bug in sibcall eligibility logic
|
2017-07-28 00:58:35 +00:00 |
tail-call-parameter-attrs-mismatch.ll
|
…
|
|
tail-call-win64.ll
|
…
|
|
tail-dup-addr.ll
|
…
|
|
tail-dup-catchret.ll
|
…
|
|
tail-dup-debugloc.ll
|
[TailDuplicator] Maintain DebugLoc for branch instructions
|
2017-02-27 19:30:01 +00:00 |
tail-dup-merge-loop-headers.ll
|
CodeGen: BlockPlacement: Don't always tail-duplicate with no other successor.
|
2017-04-10 22:28:22 +00:00 |
tail-dup-no-other-successor.ll
|
CodeGen: BlockPlacement: Don't always tail-duplicate with no other successor.
|
2017-04-10 22:28:22 +00:00 |
tail-dup-repeat.ll
|
Codegen: Make chains from trellis-shaped CFGs
|
2017-02-15 19:49:14 +00:00 |
tail-merge-after-mbp.mir
|
Change the testcase tail-merge-after-mbp.ll to tail-merge-after-mbp.mir
|
2017-04-17 22:22:38 +00:00 |
tail-merge-debugloc.ll
|
[BranchFolding] Merge debug locations from common tail instead of removing
|
2017-03-15 05:44:59 +00:00 |
tail-merge-identical.ll
|
CodeGen: BranchFolding: Merge identical blocks, even if they are short.
|
2017-04-10 22:28:12 +00:00 |
tail-merge-unreachable.ll
|
Fix some broken CHECK lines.
|
2017-01-22 20:28:56 +00:00 |
tail-merge-wineh.ll
|
…
|
|
tail-opts.ll
|
Codegen: Make chains from trellis-shaped CFGs
|
2017-02-15 19:49:14 +00:00 |
tail-threshold.ll
|
…
|
|
tailcall-64.ll
|
…
|
|
tailcall-calleesave.ll
|
…
|
|
tailcall-cgp-dup.ll
|
…
|
|
tailcall-disable.ll
|
…
|
|
tailcall-fastisel.ll
|
…
|
|
tailcall-largecode.ll
|
…
|
|
tailcall-mem-intrinsics.ll
|
…
|
|
tailcall-msvc-conventions.ll
|
…
|
|
tailcall-multiret.ll
|
…
|
|
tailcall-readnone.ll
|
…
|
|
tailcall-returndup-void.ll
|
…
|
|
tailcall-ri64.ll
|
…
|
|
tailcall-stackalign.ll
|
…
|
|
tailcall-structret.ll
|
…
|
|
tailcall.ll
|
…
|
|
tailcallbyval.ll
|
…
|
|
tailcallbyval64.ll
|
…
|
|
tailcallfp.ll
|
…
|
|
tailcallfp2.ll
|
…
|
|
tailcallpic1.ll
|
…
|
|
tailcallpic2.ll
|
…
|
|
tailcallpic3.ll
|
…
|
|
tailcallstack64.ll
|
…
|
|
taildup-crash.ll
|
…
|
|
targetLoweringGeneric.ll
|
…
|
|
tbm-intrinsics-fast-isel-x86_64.ll
|
…
|
|
tbm-intrinsics-fast-isel.ll
|
…
|
|
tbm-intrinsics-x86_64.ll
|
…
|
|
tbm_patterns.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-03 14:29:45 +00:00 |
test-nofold.ll
|
…
|
|
test-shrink-bug.ll
|
…
|
|
test-shrink.ll
|
…
|
|
testb-je-fusion.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
testl-commute.ll
|
…
|
|
this-return-64.ll
|
…
|
|
tls-addr-non-leaf-function.ll
|
…
|
|
tls-android-negative.ll
|
…
|
|
tls-android.ll
|
…
|
|
tls-local-dynamic.ll
|
…
|
|
tls-models.ll
|
…
|
|
tls-pic.ll
|
[X86] Regenerate TLS tests
|
2017-04-22 20:13:58 +00:00 |
tls-pie.ll
|
[X86] Regenerate TLS tests
|
2017-04-22 20:13:58 +00:00 |
tls-shrink-wrapping.ll
|
…
|
|
tls-windows-itanium.ll
|
…
|
|
tls.ll
|
[X86] Regenerate TLS tests
|
2017-04-22 20:13:58 +00:00 |
tlv-1.ll
|
…
|
|
tlv-2.ll
|
…
|
|
tlv-3.ll
|
…
|
|
token_landingpad.ll
|
…
|
|
trap.ll
|
…
|
|
trunc-ext-ld-st.ll
|
…
|
|
trunc-store.ll
|
…
|
|
trunc-to-bool.ll
|
Regenerate expectations for trunc-to-bool.ll . NFC
|
2017-06-03 11:35:40 +00:00 |
twoaddr-coalesce-2.ll
|
CodeGen: Rename DEBUG_TYPE to match passnames
|
2017-05-25 21:26:32 +00:00 |
twoaddr-coalesce-3.ll
|
Codegen: Make chains from trellis-shaped CFGs
|
2017-02-15 19:49:14 +00:00 |
twoaddr-coalesce.ll
|
…
|
|
twoaddr-lea.ll
|
…
|
|
twoaddr-pass-sink.ll
|
…
|
|
twoaddr-sink-terminator.ll
|
…
|
|
uint64-to-float.ll
|
…
|
|
uint_to_fp-2.ll
|
…
|
|
uint_to_fp-3.ll
|
…
|
|
uint_to_fp.ll
|
…
|
|
umul-with-carry.ll
|
…
|
|
umul-with-overflow.ll
|
[X86] Regenerated umul overflow tests on 32/64 bit targets
|
2017-07-26 11:04:18 +00:00 |
unaligned-32-byte-memops.ll
|
[X86] Don't base domain decisions on VEXTRACTF128/VINSERTF128 if only AVX1 is available.
|
2017-02-11 05:32:57 +00:00 |
unaligned-load.ll
|
…
|
|
unaligned-spill-folding.ll
|
…
|
|
undef-label.ll
|
…
|
|
unknown-location.ll
|
…
|
|
unreachable-loop-sinking.ll
|
…
|
|
unreachableblockelim.ll
|
Fix some broken CHECK lines.
|
2017-01-22 20:28:56 +00:00 |
unused_stackslots.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
unwind-init.ll
|
…
|
|
unwindraise.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
update-terminator-debugloc.ll
|
Make MachineBasicBlock::updateTerminator to update DebugLoc as well
|
2017-02-13 18:15:31 +00:00 |
update-terminator.mir
|
…
|
|
urem-i8-constant.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
urem-power-of-two.ll
|
[X86] Add urem vector test for non-uniform pow2 constants
|
2017-07-26 11:07:45 +00:00 |
use-add-flags.ll
|
…
|
|
utf8.ll
|
…
|
|
utf16-cfstrings.ll
|
…
|
|
v2f32.ll
|
…
|
|
v4f32-immediate.ll
|
…
|
|
v4i32load-crash.ll
|
…
|
|
v8i1-masks.ll
|
…
|
|
vaargs.ll
|
…
|
|
vararg-callee-cleanup.ll
|
…
|
|
vararg_no_start.ll
|
…
|
|
vararg_tailcall.ll
|
…
|
|
variable-sized-darwin-bzero.ll
|
…
|
|
variadic-node-pic.ll
|
…
|
|
vastart-defs-eflags.ll
|
…
|
|
vbinop-simplify-bug.ll
|
…
|
|
vec-copysign-avx512.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vec-copysign.ll
|
[X86] Removed reference to update_test_checks.py
|
2017-07-01 16:34:29 +00:00 |
vec-loadsingles-alignment.ll
|
…
|
|
vec-trunc-store.ll
|
…
|
|
vec3.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
vec_add.ll
|
…
|
|
vec_align.ll
|
…
|
|
vec_align_i256.ll
|
…
|
|
vec_anyext.ll
|
…
|
|
vec_call.ll
|
…
|
|
vec_cast.ll
|
…
|
|
vec_cast2.ll
|
[X86][SSE] Lower 128-bit vectors to SIGN/ZERO_EXTEND_VECTOR_IN_REG ops
|
2017-03-05 09:57:20 +00:00 |
vec_cmp_sint-128.ll
|
…
|
|
vec_cmp_uint-128.ll
|
[X86][AVX] Regenerate tests with constant broadcast comments
|
2017-07-16 11:43:16 +00:00 |
vec_compare-sse4.ll
|
…
|
|
vec_compare.ll
|
…
|
|
vec_ctbits.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
vec_ext_inreg.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vec_extract-avx.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vec_extract-mmx.ll
|
[X86][MMX] Fixed i32 extraction on 32-bit targets
|
2017-03-02 18:56:06 +00:00 |
vec_extract-sse4.ll
|
…
|
|
vec_extract.ll
|
…
|
|
vec_fabs.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vec_floor.ll
|
…
|
|
vec_fneg.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vec_fp_to_int.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
vec_fpext.ll
|
[X86] Generate VZEROUPPER for Skylake-avx512.
|
2017-03-03 09:03:24 +00:00 |
vec_fptrunc.ll
|
[X86] Don't base domain decisions on VEXTRACTF128/VINSERTF128 if only AVX1 is available.
|
2017-02-11 05:32:57 +00:00 |
vec_i64.ll
|
…
|
|
vec_ins_extract-1.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_ins_extract.ll
|
…
|
|
vec_insert-2.ll
|
…
|
|
vec_insert-3.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vec_insert-4.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_insert-5.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vec_insert-7.ll
|
…
|
|
vec_insert-8.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_insert-9.ll
|
…
|
|
vec_insert-mmx.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vec_int_to_fp.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
vec_loadsingles.ll
|
…
|
|
vec_logical.ll
|
[X86] Fix vector ANDN matching to work correctly when both inputs to the AND are XORs.
|
2017-01-28 23:52:09 +00:00 |
vec_minmax_match.ll
|
[ValueTracking] recognize variations of 'clamp' to improve codegen (PR31693)
|
2017-01-20 22:18:47 +00:00 |
vec_minmax_sint.ll
|
[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.
|
2017-02-05 18:33:24 +00:00 |
vec_minmax_uint.ll
|
[X86] Don't base domain decisions on VEXTRACTF128/VINSERTF128 if only AVX1 is available.
|
2017-02-11 05:32:57 +00:00 |
vec_partial.ll
|
[X86][SSE] Add i686 triple tests for partial vector and re-association
|
2017-05-04 13:35:40 +00:00 |
vec_reassociate.ll
|
[X86][SSE] Add i686 triple tests for partial vector and re-association
|
2017-05-04 13:35:40 +00:00 |
vec_return.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-02 15:24:08 +00:00 |
vec_round.ll
|
…
|
|
vec_sdiv_to_shift.ll
|
[DAG] vector div/rem with any zero element in divisor is undef
|
2017-03-14 18:06:28 +00:00 |
vec_set-2.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-3.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-4.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-6.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-7.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-8.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-A.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-B.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-C.ll
|
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
|
2017-05-10 15:52:59 +00:00 |
vec_set-D.ll
|
…
|
|
vec_set-F.ll
|
…
|
|
vec_set-H.ll
|
…
|
|
vec_set.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
vec_setcc-2.ll
|
…
|
|
vec_setcc.ll
|
…
|
|
vec_shift.ll
|
…
|
|
vec_shift2.ll
|
…
|
|
vec_shift3.ll
|
…
|
|
vec_shift4.ll
|
[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.
|
2017-02-05 18:33:24 +00:00 |
vec_shift5.ll
|
[X86][SSE] Add support for constant folding vector logical shift by immediates
|
2017-01-24 11:21:57 +00:00 |
vec_shift6.ll
|
[X86] Add comment string for broadcast loads from the constant pool.
|
2017-07-04 05:46:11 +00:00 |
vec_shift7.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vec_shuf-insert.ll
|
…
|
|
vec_split.ll
|
…
|
|
vec_ss_load_fold.ll
|
…
|
|
vec_trunc_sext.ll
|
…
|
|
vec_udiv_to_shift.ll
|
…
|
|
vec_uint_to_fp-fastmath.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vec_uint_to_fp.ll
|
…
|
|
vec_unsafe-fp-math.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-02 14:50:35 +00:00 |
vec_zero-2.ll
|
…
|
|
vec_zero.ll
|
…
|
|
vec_zero_cse.ll
|
[X86][SSE] Regenerate re-materialized store tests and add 64-bit test target
|
2017-02-20 15:20:37 +00:00 |
vector-bitreverse.ll
|
Add LiveRangeShrink pass to shrink live range within BB.
|
2017-05-31 23:25:25 +00:00 |
vector-blend.ll
|
[X86][SSE] Dropped -mcpu from vector blend shuffle tests and regenerate
|
2017-06-21 13:45:33 +00:00 |
vector-compare-all_of.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vector-compare-any_of.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vector-compare-combines.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
vector-compare-results.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-extend-inreg.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-gep.ll
|
…
|
|
vector-half-conversions.ll
|
[X86] Generate VZEROUPPER for Skylake-avx512.
|
2017-03-03 09:03:24 +00:00 |
vector-idiv-sdiv-128.ll
|
[X86][AVX] Regenerate vector idiv tests with constant broadcast comments
|
2017-07-16 11:38:14 +00:00 |
vector-idiv-sdiv-256.ll
|
[X86][AVX] Regenerate vector idiv tests with constant broadcast comments
|
2017-07-16 11:38:14 +00:00 |
vector-idiv-sdiv-512.ll
|
…
|
|
vector-idiv-udiv-128.ll
|
[X86][AVX] Regenerate vector idiv tests with constant broadcast comments
|
2017-07-16 11:38:14 +00:00 |
vector-idiv-udiv-256.ll
|
[X86][AVX] Regenerate vector idiv tests with constant broadcast comments
|
2017-07-16 11:38:14 +00:00 |
vector-idiv-udiv-512.ll
|
…
|
|
vector-idiv.ll
|
[X86][AVX] Regenerate vector idiv tests with constant broadcast comments
|
2017-07-16 11:38:14 +00:00 |
vector-interleave.ll
|
[X86][SSE] Dropped -mcpu from vector shuffle tests
|
2017-06-21 13:26:52 +00:00 |
vector-intrinsics.ll
|
…
|
|
vector-lzcnt-128.ll
|
[X86] Add avx512vl command lines to the 128/256-bit vector-lzcnt tests so we can see what compare instructions are being used in the lookup table code.
|
2017-05-14 19:38:11 +00:00 |
vector-lzcnt-256.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-lzcnt-512.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-merge-store-fp-constants.ll
|
[X86][SSE] Regenerate merge store tests
|
2017-06-21 13:46:42 +00:00 |
vector-narrow-binop.ll
|
[DAGCombiner] use narrow vector ops to eliminate concat/extract (PR32790)
|
2017-05-26 15:33:18 +00:00 |
vector-pcmp.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-popcnt-128.ll
|
[X86][AVX512VPOPCNTDQ] Improve support for v16i8/v8i16/v16i16/ CTPOP
|
2017-07-02 19:32:37 +00:00 |
vector-popcnt-256.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-popcnt-512.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-rem.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
vector-rotate-128.ll
|
[X86][AVX512] Add lowering of vXi32/vXi64 ISD::ROTL/ISD::ROTR
|
2017-07-17 14:11:30 +00:00 |
vector-rotate-256.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-rotate-512.ll
|
[X86][AVX512] Add lowering of vXi32/vXi64 ISD::ROTL/ISD::ROTR
|
2017-07-17 14:11:30 +00:00 |
vector-sext.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
vector-shift-ashr-128.ll
|
[X86][AVX512] Add support for ASHR v2i64/v4i64 support without VLX
|
2017-02-20 12:16:38 +00:00 |
vector-shift-ashr-256.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shift-ashr-512.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shift-lshr-128.ll
|
[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.
|
2017-02-05 18:33:24 +00:00 |
vector-shift-lshr-256.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shift-lshr-512.ll
|
[X86][SSE] Add support for constant folding vector logical shift by immediates
|
2017-01-24 11:21:57 +00:00 |
vector-shift-shl-128.ll
|
[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.
|
2017-02-05 18:33:24 +00:00 |
vector-shift-shl-256.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shift-shl-512.ll
|
[X86][SSE] Add support for constant folding vector logical shift by immediates
|
2017-01-24 11:21:57 +00:00 |
vector-shuffle-128-v2.ll
|
[X86][SSE] Dropped -mcpu from 128-bit vector shuffle tests
|
2017-06-21 14:23:02 +00:00 |
vector-shuffle-128-v4.ll
|
[X86][SSE] Dropped -mcpu from 128-bit vector shuffle tests
|
2017-06-21 14:23:02 +00:00 |
vector-shuffle-128-v8.ll
|
[X86][SSE] Dropped -mcpu from 128-bit vector shuffle tests
|
2017-06-21 14:23:02 +00:00 |
vector-shuffle-128-v16.ll
|
[X86][SSE] Dropped -mcpu from 128-bit vector shuffle tests
|
2017-06-21 14:23:02 +00:00 |
vector-shuffle-256-v4.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-256-v8.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-256-v16.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-256-v32.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-512-v8.ll
|
[DAG] Optimize away degenerate INSERT_VECTOR_ELT nodes.
|
2017-07-20 13:48:17 +00:00 |
vector-shuffle-512-v16.ll
|
[X86] Adding shuffle tests demonstrating missed vcompress opportunities. NFC
|
2017-06-29 06:22:01 +00:00 |
vector-shuffle-512-v32.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-512-v64.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-avx512.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-combining-avx.ll
|
[X86][AVX] Cleanup shuffle combine tests - remove old prefixes.
|
2017-07-28 09:41:55 +00:00 |
vector-shuffle-combining-avx2.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-combining-avx512bw.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
vector-shuffle-combining-avx512bwvl.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
vector-shuffle-combining-avx512vbmi.ll
|
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
|
2017-03-28 16:35:29 +00:00 |
vector-shuffle-combining-sse4a.ll
|
[X86][SSE4A] Add support for shuffle combining to INSERTQI.
|
2017-07-06 15:34:17 +00:00 |
vector-shuffle-combining-sse41.ll
|
[X86][SSE] Prefer to combine shuffles to VZEXT over VZEXT_MOVL.
|
2017-02-21 15:09:00 +00:00 |
vector-shuffle-combining-ssse3.ll
|
[X86][SSE] Attempt to combine 64-bit and 16-bit shuffles to unary shuffles before bit shifts
|
2017-07-02 13:19:10 +00:00 |
vector-shuffle-combining-xop.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-shuffle-combining.ll
|
[X86][SSE] Add test for PR30264 (combining multiple constants inputs in a shuffle)
|
2017-05-02 12:25:17 +00:00 |
vector-shuffle-masked.ll
|
[X86][SSE] Dropped -mcpu from vector shuffle tests
|
2017-06-21 13:26:52 +00:00 |
vector-shuffle-mmx.ll
|
…
|
|
vector-shuffle-sse1.ll
|
[X86][SSE] Dropped -mcpu from vector shuffle tests
|
2017-06-21 13:26:52 +00:00 |
vector-shuffle-sse4a.ll
|
[X86][SSE4A] Add support for combining from non-v16i8 EXTRQI/INSERTQI shuffles
|
2017-07-04 18:11:02 +00:00 |
vector-shuffle-sse41.ll
|
…
|
|
vector-shuffle-v1.ll
|
Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
|
2017-06-29 13:58:24 +00:00 |
vector-shuffle-v48.ll
|
[DAGCombiner] Add another combine from build vector to shuffle
|
2017-06-21 07:38:41 +00:00 |
vector-shuffle-variable-128.ll
|
[X86][SSE] Dropped -mcpu from variable shuffle tests
|
2017-06-21 13:15:41 +00:00 |
vector-shuffle-variable-256.ll
|
[X86][SSE] Dropped -mcpu from variable shuffle tests
|
2017-06-21 13:15:41 +00:00 |
vector-sqrt.ll
|
[x86] Revert the X86FoldTablesEmitter due to more miscompiles.
|
2017-06-06 02:15:31 +00:00 |
vector-trunc-math.ll
|
[DAGCombiner] use narrow vector ops to eliminate concat/extract (PR32790)
|
2017-05-26 15:33:18 +00:00 |
vector-trunc.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vector-truncate-combine.ll
|
DAGCombine: Combine BUILD_VECTOR to TRUNCATE
|
2017-07-03 15:47:40 +00:00 |
vector-tzcnt-128.ll
|
[X86][AVX] Regenerate vector tzcnt tests with constant broadcast comments
|
2017-07-16 11:40:23 +00:00 |
vector-tzcnt-256.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-tzcnt-512.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vector-unsigned-cmp.ll
|
[x86] avoid flipping sign bits for vector icmp by using known bits
|
2017-06-07 13:46:34 +00:00 |
vector-variable-idx.ll
|
…
|
|
vector-variable-idx2.ll
|
…
|
|
vector-zext.ll
|
[X86] Add vector zext tests.
|
2017-03-12 13:20:10 +00:00 |
vector-zmov.ll
|
[X86][SSE] Dropped -mcpu from vector zero extend tests
|
2017-06-21 13:17:14 +00:00 |
vector.ll
|
…
|
|
vectorcall.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
version_directive.ll
|
[Triple] Add a "macos" OS type that acts as a synonym for "macosx"
|
2017-05-03 10:42:35 +00:00 |
vfcmp.ll
|
…
|
|
viabs.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
virtual-registers-cleared-in-machine-functions-liveins.ll
|
[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.
|
2017-06-06 08:16:19 +00:00 |
visibility.ll
|
…
|
|
visibility2.ll
|
…
|
|
vmovq.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
volatile.ll
|
…
|
|
vortex-bug.ll
|
…
|
|
vselect-2.ll
|
…
|
|
vselect-avx.ll
|
[X86][AVX] Regenerate tests with constant broadcast comments
|
2017-07-16 11:43:16 +00:00 |
vselect-minmax.ll
|
[X86] Don't base domain decisions on VEXTRACTF128/VINSERTF128 if only AVX1 is available.
|
2017-02-11 05:32:57 +00:00 |
vselect-pcmp.ll
|
[X86] SET0 to use XMM registers where possible PR26018 PR32862
|
2017-07-27 17:47:01 +00:00 |
vselect.ll
|
…
|
|
vshift-1.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
vshift-2.ll
|
[X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/combine opportunities
|
2017-06-04 20:12:04 +00:00 |
vshift-3.ll
|
…
|
|
vshift-4.ll
|
[X86] Optimize vector shifts with variable but uniform shift amounts
|
2017-01-05 15:11:43 +00:00 |
vshift-5.ll
|
…
|
|
vshift-6.ll
|
…
|
|
vshift_scalar.ll
|
…
|
|
vshift_split.ll
|
…
|
|
vshift_split2.ll
|
…
|
|
vsplit-and.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
vzero-excess.ll
|
[x86] regenerate checks with update_llc_test_checks.py
|
2017-06-12 17:31:36 +00:00 |
warn-stack.ll
|
…
|
|
weak.ll
|
…
|
|
weak_def_can_be_hidden.ll
|
…
|
|
webkit-jscc.ll
|
…
|
|
wide-fma-contraction.ll
|
Regenerate expectation for wide-fma-contraction.ll . NFC
|
2017-06-02 19:15:04 +00:00 |
wide-integer-cmp.ll
|
Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset
|
2017-07-05 01:21:23 +00:00 |
wide-integer-fold.ll
|
…
|
|
widen_arith-1.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
widen_arith-2.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
widen_arith-3.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
widen_arith-4.ll
|
[x86] specify triples and auto-generate complete checks; NFC
|
2017-06-18 21:48:44 +00:00 |
widen_arith-5.ll
|
[x86] specify triples and auto-generate complete checks; NFC
|
2017-06-18 21:48:44 +00:00 |
widen_arith-6.ll
|
[x86] specify triples and auto-generate complete checks; NFC
|
2017-06-18 21:48:44 +00:00 |
widen_bitops-0.ll
|
[X86][SSE] Attempt to break register dependencies during lowerBuildVector
|
2017-02-09 11:50:19 +00:00 |
widen_bitops-1.ll
|
…
|
|
widen_cast-1.ll
|
[x86] specify triples and auto-generate complete checks; NFC
|
2017-06-18 21:42:19 +00:00 |
widen_cast-2.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
widen_cast-3.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
widen_cast-4.ll
|
[DAG] Improve Aliasing of operations to static alloca
|
2017-07-18 20:06:24 +00:00 |
widen_cast-5.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
widen_cast-6.ll
|
…
|
|
widen_compare-1.ll
|
…
|
|
widen_conv-1.ll
|
[x86] transform vector inc/dec to use -1 constant (PR33483)
|
2017-06-26 14:19:26 +00:00 |
widen_conv-2.ll
|
…
|
|
widen_conv-3.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
widen_conv-4.ll
|
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
|
2017-04-26 07:08:44 +00:00 |
widen_conversions.ll
|
…
|
|
widen_extract-1.ll
|
…
|
|
widen_load-0.ll
|
…
|
|
widen_load-1.ll
|
…
|
|
widen_load-2.ll
|
[X86][SSE] Attempt to extract vector elements through target shuffles
|
2017-02-27 21:01:57 +00:00 |
widen_shuffle-1.ll
|
…
|
|
widened-broadcast.ll
|
[DAGCombiner] use narrow load to avoid vector extract
|
2017-05-27 14:07:03 +00:00 |
win-alloca-expander.ll
|
Codegen: Make chains from trellis-shaped CFGs
|
2017-02-15 19:49:14 +00:00 |
win-catchpad-csrs.ll
|
…
|
|
win-catchpad-nested-cxx.ll
|
…
|
|
win-catchpad-nested.ll
|
…
|
|
win-catchpad-varargs.ll
|
…
|
|
win-catchpad.ll
|
…
|
|
win-cleanuppad.ll
|
…
|
|
win-funclet-cfi.ll
|
…
|
|
win-mixed-ehpersonality.ll
|
…
|
|
win32-eh-states.ll
|
…
|
|
win32-eh.ll
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
win32-pic-jumptable.ll
|
…
|
|
win32-seh-catchpad-realign.ll
|
…
|
|
win32-seh-catchpad.ll
|
…
|
|
win32-seh-nested-finally.ll
|
…
|
|
win32-spill-xmm.ll
|
Elide stores which are overwritten without being observed.
|
2017-05-16 19:43:56 +00:00 |
win32_sret.ll
|
…
|
|
win64-jumptable.ll
|
Revert "[COFF] Use 32-bit jump table entries in .rdata for Win64"
|
2016-12-29 17:07:10 +00:00 |
win64-nosse-csrs.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
win64_alloca_dynalloca.ll
|
…
|
|
win64_call_epi.ll
|
…
|
|
win64_eh.ll
|
…
|
|
win64_eh_leaf.ll
|
Mark functions as not having CFI once we finalize an x86 stack frame
|
2017-05-03 23:13:42 +00:00 |
win64_eh_leaf2.ll
|
[WinEH] Adjust decision to emit SEH moves for leaf functions
|
2017-03-20 17:45:59 +00:00 |
win64_frame.ll
|
…
|
|
win64_nonvol.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
win64_params.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
win64_sibcall.ll
|
Elide stores which are overwritten without being observed.
|
2017-05-16 19:43:56 +00:00 |
win64_vararg.ll
|
Elide stores which are overwritten without being observed.
|
2017-05-16 19:43:56 +00:00 |
win_chkstk.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
win_coreclr_chkstk.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
win_cst_pool.ll
|
…
|
|
windows-itanium-alloca.ll
|
…
|
|
wineh-coreclr.ll
|
…
|
|
wineh-exceptionpointer.ll
|
…
|
|
wineh-no-ehpads.ll
|
…
|
|
x32-function_pointer-1.ll
|
…
|
|
x32-function_pointer-2.ll
|
…
|
|
x32-function_pointer-3.ll
|
…
|
|
x32-indirectbr.ll
|
…
|
|
x32-landingpad.ll
|
…
|
|
x32-lea-1.ll
|
[x86] auto-generate complete checks for tests; NFC
|
2017-07-02 14:50:35 +00:00 |
x32-movtopush64.ll
|
…
|
|
x32-va_start.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
x86-16.ll
|
[X86] Remove special handling for 16 bit for A asm constraints.
|
2017-04-16 20:13:08 +00:00 |
x86-32-intrcc.ll
|
[X86] Support of no_caller_saved_registers attribute
|
2017-05-03 13:07:19 +00:00 |
x86-32-vector-calling-conv.ll
|
…
|
|
x86-64-and-mask.ll
|
…
|
|
x86-64-arg.ll
|
…
|
|
x86-64-asm.ll
|
…
|
|
x86-64-baseptr.ll
|
…
|
|
x86-64-call.ll
|
…
|
|
x86-64-dead-stack-adjust.ll
|
…
|
|
x86-64-disp.ll
|
…
|
|
x86-64-double-precision-shift-left.ll
|
…
|
|
x86-64-double-precision-shift-right.ll
|
…
|
|
x86-64-double-shifts-Oz-Os-O2.ll
|
…
|
|
x86-64-double-shifts-var.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
x86-64-extend-shift.ll
|
…
|
|
x86-64-flags-intrinsics.ll
|
…
|
|
x86-64-gv-offset.ll
|
…
|
|
x86-64-intrcc-nosse.ll
|
x86 interrupt calling convention: re-align stack pointer on 64-bit if an error code was pushed
|
2017-04-03 20:28:45 +00:00 |
x86-64-intrcc.ll
|
[X86] Support of no_caller_saved_registers attribute
|
2017-05-03 13:07:19 +00:00 |
x86-64-jumps.ll
|
…
|
|
x86-64-mem.ll
|
…
|
|
x86-64-ms_abi-vararg.ll
|
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
|
2017-07-17 20:05:19 +00:00 |
x86-64-pic-1.ll
|
…
|
|
x86-64-pic-2.ll
|
…
|
|
x86-64-pic-3.ll
|
…
|
|
x86-64-pic-4.ll
|
…
|
|
x86-64-pic-5.ll
|
…
|
|
x86-64-pic-6.ll
|
…
|
|
x86-64-pic-7.ll
|
…
|
|
x86-64-pic-8.ll
|
…
|
|
x86-64-pic-9.ll
|
…
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x86-64-pic-10.ll
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…
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x86-64-pic-11.ll
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…
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x86-64-pic-12.ll
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…
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x86-64-pic.ll
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…
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x86-64-plt-relative-reloc.ll
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…
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x86-64-psub.ll
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…
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x86-64-ptr-arg-simple.ll
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…
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x86-64-ret0.ll
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…
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x86-64-shortint.ll
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…
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x86-64-sret-return-2.ll
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…
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x86-64-sret-return.ll
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…
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x86-64-stack-and-frame-ptr.ll
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…
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x86-64-static-relo-movl.ll
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…
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x86-64-tls-1.ll
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…
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x86-64-varargs.ll
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…
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x86-big-ret.ll
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…
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x86-cmov-converter.ll
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Fixed line endings. NFCI.
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2017-07-17 13:58:20 +00:00 |
x86-flags-intrinsics.ll
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…
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x86-fold-pshufb.ll
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…
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x86-framelowering-trap.ll
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Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
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2017-06-29 13:58:24 +00:00 |
x86-inline-asm-validation.ll
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…
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x86-interleaved-access.ll
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Expanding the test case for vf8 for stride 4 interleaved.
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2017-07-30 11:54:57 +00:00 |
x86-interrupt_cc.ll
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…
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x86-interrupt_cld.ll
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…
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x86-interrupt_vzeroupper.ll
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…
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x86-mixed-alignment-dagcombine.ll
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…
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x86-no_caller_saved_registers-preserve.ll
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Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"
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2017-06-29 13:58:24 +00:00 |
x86-no_caller_saved_registers.ll
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Normalize line endings. NFCI,
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2017-05-08 13:32:34 +00:00 |
x86-plt-relative-reloc.ll
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…
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x86-repmov-copy-eflags.ll
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…
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x86-sanitizer-shrink-wrapping.ll
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Fix some broken CHECK lines.
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2017-01-22 20:28:56 +00:00 |
x86-setcc-int-to-fp-combine.ll
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…
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x86-shifts.ll
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…
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x86-shrink-wrap-unwind.ll
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…
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x86-shrink-wrapping.ll
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[ShrinkWrapping] Handle restores on no-return paths
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2017-05-15 23:13:35 +00:00 |
x86-store-gv-addr.ll
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…
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x86-upgrade-avx-vbroadcast.ll
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…
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x86-upgrade-avx2-vbroadcast.ll
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…
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x86-win64-shrink-wrapping.ll
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…
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x86_64-mul-by-const.ll
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…
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x87.ll
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AsmPrinter: mark the beginning and the end of a function in verbose mode
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2017-05-23 21:22:16 +00:00 |
xaluo.ll
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[DAGCombiner] Do various combine on uaddo.
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2017-03-09 22:47:00 +00:00 |
xchg-nofold.ll
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Regenerate xchg-nofold.ll expected results. NFC.
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2017-05-31 09:44:08 +00:00 |
xmm-r64.ll
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…
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xmulo.ll
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[X86][AVX512] Make i1 illegal in the CodeGen
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2017-05-19 12:35:15 +00:00 |
xop-ifma.ll
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[X86][XOP] Added support for VPMADCSWD 'extend+hadd' IFMA patterns
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2017-01-14 18:52:13 +00:00 |
xop-intrinsics-fast-isel.ll
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[X86] SET0 to use XMM registers where possible PR26018 PR32862
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2017-07-27 17:47:01 +00:00 |
xop-intrinsics-x86_64-upgrade.ll
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Recommit "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."
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2017-02-18 21:50:58 +00:00 |
xop-intrinsics-x86_64.ll
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Recommit "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."
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2017-02-18 21:50:58 +00:00 |
xop-mask-comments.ll
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[X86][SSE] Allow matchVectorShuffleWithUNPCK to recognise ZERO inputs
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2017-02-15 11:46:15 +00:00 |
xop-pcmov.ll
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…
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xor-combine-debugloc.ll
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[DAGCombiner] Fix DebugLoc propagation when folding !(x cc y) -> (x !cc y)
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2017-03-02 21:58:35 +00:00 |
xor-icmp.ll
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Specify triple for xor-icmp.ll .
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2017-06-02 07:45:22 +00:00 |
xor-select-i1-combine.ll
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[X86][AVX512] Make i1 illegal in the CodeGen
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2017-05-19 12:35:15 +00:00 |
xor.ll
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…
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xray-attribute-instrumentation.ll
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[XRay] Reduce synthetic references emitted by XRay
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2017-06-21 06:39:42 +00:00 |
xray-custom-log.ll
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[XRay] Reduce synthetic references emitted by XRay
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2017-06-21 06:39:42 +00:00 |
xray-empty-firstmbb.mir
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…
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xray-empty-function.mir
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…
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xray-log-args.ll
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[XRay] Reduce synthetic references emitted by XRay
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2017-06-21 06:39:42 +00:00 |
xray-loop-detection.ll
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[XRay] Detect loops in functions being lowered
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2017-05-04 01:24:26 +00:00 |
xray-multiplerets-in-blocks.mir
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…
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xray-section-group.ll
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…
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xray-selective-instrumentation-miss.ll
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…
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xray-selective-instrumentation.ll
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…
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xray-tail-call-sled.ll
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[XRay] Reduce synthetic references emitted by XRay
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2017-06-21 06:39:42 +00:00 |
xtest.ll
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…
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zero-remat.ll
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…
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zext-extract_subreg.ll
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…
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zext-fold.ll
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…
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zext-inreg-0.ll
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…
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zext-inreg-1.ll
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…
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zext-sext.ll
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…
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zext-shl.ll
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[x86] auto-generate complete checks for tests; NFC
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2017-07-02 14:50:35 +00:00 |
zext-trunc.ll
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[x86] auto-generate complete checks for tests; NFC
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2017-07-02 14:50:35 +00:00 |
zlib-longest-match.ll
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…
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