forked from OSchip/llvm-project
123 lines
5.0 KiB
C
123 lines
5.0 KiB
C
// RUN: %clang_cc1 -triple armv8.1a-linux-gnu -target-feature +neon \
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// RUN: -O3 -S -o - %s \
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// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM
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// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
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// RUN: -target-feature +v8.1a -O3 -S -o - %s \
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// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
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// REQUIRES: arm-registered-target,aarch64-registered-target
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#include <arm_neon.h>
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// CHECK-LABEL: test_vqrdmlah_s16
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int16x4_t test_vqrdmlah_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlah.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
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return vqrdmlah_s16(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlah_s32
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int32x2_t test_vqrdmlah_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlah.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
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return vqrdmlah_s32(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlahq_s16
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int16x8_t test_vqrdmlahq_s16(int16x8_t a, int16x8_t b, int16x8_t c) {
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// CHECK-ARM: vqrdmlah.s16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
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return vqrdmlahq_s16(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlahq_s32
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int32x4_t test_vqrdmlahq_s32(int32x4_t a, int32x4_t b, int32x4_t c) {
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// CHECK-ARM: vqrdmlah.s32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
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return vqrdmlahq_s32(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlah_lane_s16
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int16x4_t test_vqrdmlah_lane_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlah.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[3]
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
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return vqrdmlah_lane_s16(a, b, c, 3);
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}
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// CHECK-LABEL: test_vqrdmlah_lane_s32
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int32x2_t test_vqrdmlah_lane_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlah.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[1]
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
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return vqrdmlah_lane_s32(a, b, c, 1);
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}
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// CHECK-LABEL: test_vqrdmlahq_lane_s16
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int16x8_t test_vqrdmlahq_lane_s16(int16x8_t a, int16x8_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlah.s16 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[3]
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
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return vqrdmlahq_lane_s16(a, b, c, 3);
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}
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// CHECK-LABEL: test_vqrdmlahq_lane_s32
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int32x4_t test_vqrdmlahq_lane_s32(int32x4_t a, int32x4_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlah.s32 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[1]
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// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
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return vqrdmlahq_lane_s32(a, b, c, 1);
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}
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// CHECK-LABEL: test_vqrdmlsh_s16
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int16x4_t test_vqrdmlsh_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlsh.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
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return vqrdmlsh_s16(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlsh_s32
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int32x2_t test_vqrdmlsh_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlsh.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
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return vqrdmlsh_s32(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlshq_s16
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int16x8_t test_vqrdmlshq_s16(int16x8_t a, int16x8_t b, int16x8_t c) {
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// CHECK-ARM: vqrdmlsh.s16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
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return vqrdmlshq_s16(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlshq_s32
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int32x4_t test_vqrdmlshq_s32(int32x4_t a, int32x4_t b, int32x4_t c) {
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// CHECK-ARM: vqrdmlsh.s32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
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return vqrdmlshq_s32(a, b, c);
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}
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// CHECK-LABEL: test_vqrdmlsh_lane_s16
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int16x4_t test_vqrdmlsh_lane_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlsh.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[3]
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
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return vqrdmlsh_lane_s16(a, b, c, 3);
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}
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// CHECK-LABEL: test_vqrdmlsh_lane_s32
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int32x2_t test_vqrdmlsh_lane_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlsh.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[1]
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
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return vqrdmlsh_lane_s32(a, b, c, 1);
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}
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// CHECK-LABEL: test_vqrdmlshq_lane_s16
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int16x8_t test_vqrdmlshq_lane_s16(int16x8_t a, int16x8_t b, int16x4_t c) {
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// CHECK-ARM: vqrdmlsh.s16 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[3]
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
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return vqrdmlshq_lane_s16(a, b, c, 3);
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}
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// CHECK-LABEL: test_vqrdmlshq_lane_s32
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int32x4_t test_vqrdmlshq_lane_s32(int32x4_t a, int32x4_t b, int32x2_t c) {
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// CHECK-ARM: vqrdmlsh.s32 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[1]
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// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
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return vqrdmlshq_lane_s32(a, b, c, 1);
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}
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