llvm-project/llvm/test
Alexey Bataev ec95c6cc0a [InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1, &V2)) --> store (, load (select(Cond, load &V1, load &V2)))
Summary:
If we have the code like this:
```
float a, b;
a = std::max(a ,b);
```
it is converted into something like this:
```
%call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float* nonnull dereferenceable(4) %a.addr, float* nonnull dereferenceable(4) %b.addr)
%1 = bitcast float* %call to i32*
%2 = load i32, i32* %1, align 4
%3 = bitcast float* %a.addr to i32*
store i32 %2, i32* %3, align 4
```
After inlinning this code is converted to the next:
```
%1 = load float, float* %a.addr
%2 = load float, float* %b.addr
%cmp.i = fcmp fast olt float %1, %2
%__b.__a.i = select i1 %cmp.i, float* %a.addr, float* %b.addr
%3 = bitcast float* %__b.__a.i to i32*
%4 = load i32, i32* %3, align 4
%5 = bitcast float* %arrayidx to i32*
store i32 %4, i32* %5, align 4

```
This pattern is not recognized as minmax pattern.
Patch solves this problem by converting sequence
```
store (bitcast, (load bitcast (select ((cmp V1, V2), &V1, &V2))))
```
to a sequence
```
store (,load (select((cmp V1, V2), &V1, &V2)))
```
After this the code is recognized as minmax pattern.

Reviewers: RKSimon, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40304

llvm-svn: 320157
2017-12-08 15:32:10 +00:00
..
Analysis [SCEV] Fix predicate usage in computeExitLimitFromICmp 2017-12-08 12:19:45 +00:00
Assembler [ConstantFold] Support vector index when factoring out GEP index into preceding dimensions 2017-12-04 19:56:33 +00:00
Bindings [LLVM-C] Expose functions to create debug locations via DIBuilder. 2017-11-01 22:18:52 +00:00
Bitcode [ThinLTO] Remove too aggressive assertion in building function call graph. 2017-11-17 18:28:05 +00:00
BugPoint
CodeGen [X86][Haswell]: Updating the scheduling information for the Haswell subtarget. 2017-12-08 09:48:44 +00:00
DebugInfo [DebugInfo] Move this test to X86/ now that it specifies a triple. 2017-12-07 16:10:39 +00:00
Examples
ExecutionEngine [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
Feature
FileCheck Add a -D flag to FileCheck to define variables 2017-11-07 13:24:44 +00:00
Instrumentation [PowerPC][asan] Update asan to handle changed memory layouts in newer kernels 2017-12-07 22:53:33 +00:00
Integer
JitListener
LTO Object: Improve COFF irsymtab comdat representation. 2017-11-21 22:06:20 +00:00
Linker
MC [RISCV] MC layer support for the jump/branch instructions of the RVC extension 2017-12-07 13:19:57 +00:00
Object Add flag to ArchiveWriter to test GNU64 format more efficiently 2017-12-01 00:54:28 +00:00
ObjectYAML Update obj2yaml and yaml2obj for .debug$H section. 2017-12-06 18:58:48 +00:00
Other IR printing improvement for loop passes - handle -print-module-scope 2017-12-01 18:33:58 +00:00
SafepointIRVerifier [SafepointIRVerifier] Allow deriving pointers from unrelocated base 2017-12-05 21:39:37 +00:00
SymbolRewriter
TableGen [TableGen] Give the option of tolerating duplicate register names 2017-12-07 09:51:55 +00:00
ThinLTO/X86 [LTO][ThinLTO] Use the linker resolutions to mark global values as dso_local. 2017-11-04 17:04:39 +00:00
Transforms [InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1, &V2)) --> store (, load (select(Cond, load &V1, load &V2))) 2017-12-08 15:32:10 +00:00
Unit
Verifier
YAMLParser
tools [dsymutil] Add -verify option to run DWARF verifier after linking. 2017-12-07 11:17:19 +00:00
.clang-format
CMakeLists.txt [llvm-opt-fuzzer] Add opt fuzzer to the test-depends list. 2017-11-15 15:07:37 +00:00
TestRunner.sh
lit.cfg.py Add opt-viewer testing 2017-11-29 17:07:41 +00:00
lit.site.cfg.py.in Add opt-viewer testing 2017-11-29 17:07:41 +00:00