Craig Topper c2d25ed1b3 [X86] Prevent crash in LowerBUILD_VECTORvXi1 for v64i1 vectors on 32-bit targets when the vector is a mix of constants and non-constant. ... We need to materialize the constants as two 32-bit values that are casted to v32i1 and then concatenated. llvm-svn: 372304		2019-09-19 06:50:39 +00:00
..
AArch64	GlobalISel: Don't materialize immarg arguments to intrinsics	2019-09-19 01:33:14 +00:00
AMDGPU	AMDGPU/GlobalISel: RegBankSelect llvm.amdgcn.ds.swizzle	2019-09-19 04:11:17 +00:00
ARC	…
ARM	Remove the obsolete BlockByRefStruct flag from LLVM IR	2019-09-18 22:38:56 +00:00
AVR	…
BPF	[BPF] Permit all user instructed offset relocatiions	2019-09-18 03:49:07 +00:00
Generic	Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.""	2019-09-10 10:39:09 +00:00
Hexagon	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
Inputs	…
Lanai	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
MIR	[PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC	2019-09-13 14:18:36 +00:00
MSP430	…
Mips	[MIPS] For vectors, select `add %x, C` as `sub %x, -C` if it results in inline immediate	2019-09-18 19:34:41 +00:00
NVPTX	…
PowerPC	[PowerPC] Exploit single instruction load-and-splat for word and doubleword	2019-09-17 16:45:20 +00:00
RISCV	[RISCV] Switch to the Machine Scheduler	2019-09-17 11:15:35 +00:00
SPARC	[test] Fix tests when run on windows after SVN r369426. NFC.	2019-08-20 20:58:02 +00:00
SystemZ	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
Thumb	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
Thumb2	[ARM] Fix for buildbots	2019-09-19 06:50:19 +00:00
WebAssembly	[WebAssembly] Restore defaults for stores per memop	2019-09-18 23:18:16 +00:00
WinCFGuard	…
WinEH	[Windows] Replace TrapUnreachable with an int3 insertion pass	2019-09-09 23:04:25 +00:00
X86	[X86] Prevent crash in LowerBUILD_VECTORvXi1 for v64i1 vectors on 32-bit targets when the vector is a mix of constants and non-constant.	2019-09-19 06:50:39 +00:00
XCore	…