forked from OSchip/llvm-project
327 lines
8.3 KiB
ArmAsm
327 lines
8.3 KiB
ArmAsm
@ RUN: llvm-mc -triple armv7-linux-eabi -filetype obj -o - %s \
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@ RUN: | llvm-readobj -u | FileCheck %s
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.syntax unified
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.cpu cortex-a8
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.fpu neon
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.section .personality
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.type __personality,%function
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__personality:
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.fnstart
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bkpt
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.fnend
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.section .personality0
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.type personality0,%function
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personality0:
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.fnstart
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bx lr
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.fnend
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.section .personality1
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.type personality1,%function
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personality1:
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.fnstart
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.pad #0x100
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sub sp, sp, #0x100
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.save {r0-r11}
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push {r0-r11}
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pop {r0-r11}
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add sp, sp, #0x100
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bx lr
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.fnend
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.section .custom_personality
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.type custom_personality,%function
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custom_personality:
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.fnstart
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.personality __personality
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bx lr
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.fnend
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.section .opcodes
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.type opcodes,%function
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opcodes:
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.fnstart
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.vsave {d8-d12}
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vpush {d8-d12}
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vpop {d8-d12}
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bx lr
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.fnend
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.section .multiple
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.type function0,%function
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function0:
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.fnstart
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bx lr
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.fnend
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.type function1,%function
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function1:
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.fnstart
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.personality __personality
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bx lr
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.fnend
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.type function2,%function
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function2:
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.fnstart
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bx lr
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.fnend
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.section .raw
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.type raw,%function
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.thumb_func
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raw:
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.fnstart
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.unwind_raw 12, 0x02
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.unwind_raw -12, 0x42
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.unwind_raw 0, 0x80, 0x00
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.unwind_raw 4, 0x81, 0x00
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.unwind_raw 4, 0x80, 0x01
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.unwind_raw 8, 0x80, 0xc0
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.unwind_raw 12, 0x84, 0xc0
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.unwind_raw 0, 0x91
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.unwind_raw 8, 0xa1
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.unwind_raw 12, 0xa9
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.unwind_raw 0, 0xb0
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.unwind_raw 4, 0xb1, 0x01
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.unwind_raw 0xa04, 0xb2, 0x80, 0x04
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.unwind_raw 24, 0xb3, 0x12
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.unwind_raw 24, 0xba
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.unwind_raw 24, 0xc2
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.unwind_raw 24, 0xc6, 0x02
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.unwind_raw 8, 0xc7, 0x03
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.unwind_raw 24, 0xc8, 0x02
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.unwind_raw 24, 0xc9, 0x02
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.unwind_raw 64, 0xd7
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.fnend
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.section .spare
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.type spare,%function
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spare:
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.fnstart
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.unwind_raw 4, 0x00
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.unwind_raw -4, 0x40
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.unwind_raw 0, 0x80, 0x00
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.unwind_raw 4, 0x88, 0x00
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.unwind_raw 0, 0x91
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.unwind_raw 0, 0x9d
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.unwind_raw 0, 0x9f
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.unwind_raw 0, 0xa0
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.unwind_raw 0, 0xa8
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.unwind_raw 0, 0xb0
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.unwind_raw 0, 0xb1, 0x00
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.unwind_raw 4, 0xb1, 0x01
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.unwind_raw 0, 0xb1, 0x10
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.unwind_raw 0x204, 0xb2, 0x00
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.unwind_raw 16, 0xb3, 0x00
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.unwind_raw 0, 0xb4
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.unwind_raw 16, 0xb8
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.unwind_raw 4, 0xc0
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.unwind_raw 4, 0xc6, 0x00
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.unwind_raw 4, 0xc7, 0x00
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.unwind_raw 4, 0xc7, 0x01
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.unwind_raw 0, 0xc7, 0x10
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.unwind_raw 16, 0xc8, 0x00
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.unwind_raw 16, 0xc9, 0x00
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.unwind_raw 0, 0xca
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.unwind_raw 16, 0xd0
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.unwind_raw 0, 0xd8
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.fnend
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@ CHECK: UnwindInformation {
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@ CHECK: UnwindIndexTable {
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@ CHECK: SectionName: .ARM.exidx.personality
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@ CHECK: Entries [
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@ CHECK: Entry {
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@ CHECK: FunctionAddress: 0x0
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@ CHECK: FunctionName: __personality
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@ CHECK: Model: Compact (Inline)
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@ CHECK: PersonalityIndex: 0
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@ CHECK: Opcodes [
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: UnwindIndexTable {
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@ CHECK: SectionName: .ARM.exidx.personality0
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@ CHECK: Entries [
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@ CHECK: Entry {
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@ CHECK: FunctionAddress: 0x0
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@ CHECK: FunctionName: personality0
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@ CHECK: Model: Compact (Inline)
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@ CHECK: PersonalityIndex: 0
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@ CHECK: Opcodes [
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: UnwindIndexTable {
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@ CHECK: SectionName: .ARM.exidx.personality1
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@ CHECK: Entries [
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@ CHECK: Entry {
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@ CHECK: FunctionAddress: 0x0
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@ CHECK: FunctionName: personality1
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@ CHECK: ExceptionHandlingTable: .ARM.extab.personality1
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@ CHECK: TableEntryOffset: 0x0
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@ CHECK: Model: Compact
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@ CHECK: PersonalityIndex: 1
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@ CHECK: Opcodes [
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@ CHECK: 0xB1 0x0F ; pop {r0, r1, r2, r3}
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@ CHECK: 0xA7 ; pop {r4, r5, r6, r7, r8, r9, r10, fp}
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@ CHECK: 0x3F ; vsp = vsp + 256
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: UnwindIndexTable {
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@ CHECK: SectionName: .ARM.exidx.custom_personality
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@ CHECK: Entries [
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@ CHECK: Entry {
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@ CHECK: FunctionAddress: 0x0
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@ CHECK: FunctionName: custom_personality
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@ CHECK: ExceptionHandlingTable: .ARM.extab.custom_personality
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@ CHECK: TableEntryOffset: 0x0
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@ CHECK: Model: Generic
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@ CHECK: PersonalityRoutineAddress: 0x0
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@ CHECK: }
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: UnwindIndexTable {
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@ CHECK: SectionName: .ARM.exidx.opcodes
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@ CHECK: Entries [
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@ CHECK: Entry {
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@ CHECK: FunctionAddress: 0x0
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@ CHECK: FunctionName: opcodes
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@ CHECK: Model: Compact (Inline)
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@ CHECK: PersonalityIndex: 0
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@ CHECK: Opcodes [
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@ CHECK: 0xC9 0x84 ; pop {d8, d9, d10, d11, d12}
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@ CHECK: 0xB0 ; finish
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: UnwindIndexTable {
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@ CHECK: SectionName: .ARM.exidx.multiple
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@ CHECK: Entries [
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@ CHECK: Entry {
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@ CHECK: FunctionAddress: 0x0
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@ CHECK: FunctionName: function0
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@ CHECK: Model: Compact (Inline)
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@ CHECK: PersonalityIndex: 0
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@ CHECK: Opcodes [
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: Entry {
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@ CHECK: FunctionAddress: 0x4
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@ CHECK: FunctionName: function1
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@ CHECK: ExceptionHandlingTable: .ARM.extab.multiple
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@ CHECK: Model: Generic
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@ CHECK: PersonalityRoutineAddress: 0x0
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@ CHECK: }
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@ CHECK: Entry {
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@ CHECK: FunctionAddress: 0x8
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@ CHECK: FunctionName: function2
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@ CHECK: Model: Compact (Inline)
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@ CHECK: PersonalityIndex: 0
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@ CHECK: Opcodes [
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xB0 ; finish
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: UnwindIndexTable {
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@ CHECK: SectionName: .ARM.exidx.raw
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@ CHECK: Entries [
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@ CHECK: Opcodes [
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@ CHECK: 0xD7 ; pop {d8, d9, d10, d11, d12, d13, d14, d15}
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@ CHECK: 0xC9 0x02 ; pop {d0, d1, d2}
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@ CHECK: 0xC8 0x02 ; pop {d16, d17, d18}
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@ CHECK: 0xC7 0x03 ; pop {wCGR0, wCGR1}
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@ CHECK: 0xC6 0x02 ; pop {wR0, wR1, wR2}
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@ CHECK: 0xC2 ; pop {wR10, wR11, wR12}
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@ CHECK: 0xBA ; pop {d8, d9, d10}
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@ CHECK: 0xB3 0x12 ; pop {d1, d2, d3}
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@ CHECK: 0xB2 0x80 0x04 ; vsp = vsp + 2564
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@ CHECK: 0xB1 0x01 ; pop {r0}
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xA9 ; pop {r4, r5, lr}
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@ CHECK: 0xA1 ; pop {r4, r5}
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@ CHECK: 0x91 ; vsp = r1
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@ CHECK: 0x84 0xC0 ; pop {r10, fp, lr}
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@ CHECK: 0x80 0xC0 ; pop {r10, fp}
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@ CHECK: 0x80 0x01 ; pop {r4}
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@ CHECK: 0x81 0x00 ; pop {ip}
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@ CHECK: 0x80 0x00 ; refuse to unwind
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@ CHECK: 0x42 ; vsp = vsp - 12
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@ CHECK: 0x02 ; vsp = vsp + 12
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@ CHECK: ]
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: UnwindIndexTable {
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@ CHECK: SectionName: .ARM.exidx.spare
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@ CHECK: Entries [
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@ CHECK: Opcodes [
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@ CHECK: 0xD8 ; spare
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@ CHECK: 0xD0 ; pop {d8}
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@ CHECK: 0xCA ; spare
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@ CHECK: 0xC9 0x00 ; pop {d0}
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@ CHECK: 0xC8 0x00 ; pop {d16}
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@ CHECK: 0xC7 0x10 ; spare
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@ CHECK: 0xC7 0x01 ; pop {wCGR0}
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@ CHECK: 0xC7 0x00 ; spare
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@ CHECK: 0xC6 0x00 ; pop {wR0}
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@ CHECK: 0xC0 ; pop {wR10}
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@ CHECK: 0xB8 ; pop {d8}
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@ CHECK: 0xB4 ; spare
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@ CHECK: 0xB3 0x00 ; pop {d0}
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@ CHECK: 0xB2 0x00 ; vsp = vsp + 516
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@ CHECK: 0xB1 0x10 ; spare
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@ CHECK: 0xB1 0x01 ; pop {r0}
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@ CHECK: 0xB1 0x00 ; spare
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@ CHECK: 0xB0 ; finish
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@ CHECK: 0xA8 ; pop {r4, lr}
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@ CHECK: 0xA0 ; pop {r4}
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@ CHECK: 0x9F ; reserved (WiMMX MOVrr)
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@ CHECK: 0x9D ; reserved (ARM MOVrr)
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@ CHECK: 0x91 ; vsp = r1
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@ CHECK: 0x88 0x00 ; pop {pc}
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@ CHECK: 0x80 0x00 ; refuse to unwind
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@ CHECK: 0x40 ; vsp = vsp - 4
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@ CHECK: 0x00 ; vsp = vsp + 4
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@ CHECK: ]
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@ CHECK: ]
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@ CHECK: }
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@ CHECK: }
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